From 19ead962c4c0331de6bd9624843f8a80608bff60 Mon Sep 17 00:00:00 2001 From: Maggie Li Date: Tue, 9 Dec 2008 21:52:42 +0000 Subject: AMD PISTACHIO mainboard support. The following ACPI features are supported: 1. S1, S4, S5 sleep and wake up (by power button). 2. Thermal configuration based on ADT7475. 3. HPET timer. 4. Interrupt routing based on ACPI table. Signed-off-by: Maggie Li Reviewed-by: Michael Xie Acked-by: Ronald G. Minnich git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3808 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- targets/amd/pistachio/Config.lb | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) create mode 100644 targets/amd/pistachio/Config.lb (limited to 'targets/amd/pistachio/Config.lb') diff --git a/targets/amd/pistachio/Config.lb b/targets/amd/pistachio/Config.lb new file mode 100644 index 0000000000..af8e1afa40 --- /dev/null +++ b/targets/amd/pistachio/Config.lb @@ -0,0 +1,21 @@ +# This will make a target directory of ./pistachio + +target pistachio +mainboard amd/pistachio + +romimage "normal" + option ROM_SIZE = 1024*1024 - 55808 + option USE_FALLBACK_IMAGE=0 + option ROM_IMAGE_SIZE=0x20000 + option XIP_ROM_SIZE=0x20000 + payload ../payload.elf +end + +romimage "fallback" + option USE_FALLBACK_IMAGE=1 + option ROM_IMAGE_SIZE=0x20000 + option XIP_ROM_SIZE=0x20000 + payload ../payload.elf +end + +buildrom ./coreboot.rom ROM_SIZE "normal" "fallback" -- cgit v1.2.3