From f771e569d72d6b7166ca0d92afaaf2e635a9ba1c Mon Sep 17 00:00:00 2001 From: Patrick Georgi Date: Sat, 3 May 2014 09:12:55 +0200 Subject: Drop useless mainboard-romstage defines MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Some src/mainboard/*/*/romstage.c files use defines which later modify the behaviour of included .c files. Since it's a pain to work out what is affected by these, drop values that are only defined in the board but never used, or defined to identical values as in spd.h (and use that one instead). Change-Id: I8143b26fddc32a40ac4e611a6287bf7f144267dc Signed-off-by: Patrick Georgi Reviewed-on: http://review.coreboot.org/5639 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki --- src/mainboard/amd/bimini_fam10/romstage.c | 3 --- src/mainboard/amd/dbm690t/romstage.c | 5 ----- src/mainboard/amd/mahogany/romstage.c | 5 ----- src/mainboard/asrock/939a785gmh/romstage.c | 5 ----- src/mainboard/kontron/kt690/romstage.c | 5 ----- src/mainboard/siemens/sitemp_g1p1/romstage.c | 10 +--------- src/mainboard/supermicro/h8scm_fam10/romstage.c | 9 --------- src/mainboard/technexion/tim5690/romstage.c | 5 ----- src/mainboard/technexion/tim8690/romstage.c | 5 ----- 9 files changed, 1 insertion(+), 51 deletions(-) (limited to 'src') diff --git a/src/mainboard/amd/bimini_fam10/romstage.c b/src/mainboard/amd/bimini_fam10/romstage.c index 9f930e83cf..5c5b44fe73 100644 --- a/src/mainboard/amd/bimini_fam10/romstage.c +++ b/src/mainboard/amd/bimini_fam10/romstage.c @@ -67,9 +67,6 @@ static int spd_read_byte(u32 device, u32 address) #include "cpu/amd/model_10xxx/init_cpus.c" #include "northbridge/amd/amdfam10/early_ht.c" -#define RC00 0 -#define RC01 1 - void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { struct sys_info *sysinfo = &sysinfo_car; diff --git a/src/mainboard/amd/dbm690t/romstage.c b/src/mainboard/amd/dbm690t/romstage.c index 74b6d1b187..7a0c8f936b 100644 --- a/src/mainboard/amd/dbm690t/romstage.c +++ b/src/mainboard/amd/dbm690t/romstage.c @@ -17,11 +17,6 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#define RC0 (6<<8) -#define RC1 (7<<8) - -#define SMBUS_HUB 0x71 - #include #include #include diff --git a/src/mainboard/amd/mahogany/romstage.c b/src/mainboard/amd/mahogany/romstage.c index b77d4b5a1b..93870c5367 100644 --- a/src/mainboard/amd/mahogany/romstage.c +++ b/src/mainboard/amd/mahogany/romstage.c @@ -17,11 +17,6 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#define RC0 (6<<8) -#define RC1 (7<<8) - -#define SMBUS_HUB 0x71 - #include #include #include diff --git a/src/mainboard/asrock/939a785gmh/romstage.c b/src/mainboard/asrock/939a785gmh/romstage.c index ce0a6ac268..417f9a7845 100644 --- a/src/mainboard/asrock/939a785gmh/romstage.c +++ b/src/mainboard/asrock/939a785gmh/romstage.c @@ -18,11 +18,6 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#define RC0 (6<<8) -#define RC1 (7<<8) - -#define SMBUS_HUB 0x71 - #include #include #include diff --git a/src/mainboard/kontron/kt690/romstage.c b/src/mainboard/kontron/kt690/romstage.c index 4e45dc4f18..24cae41bde 100644 --- a/src/mainboard/kontron/kt690/romstage.c +++ b/src/mainboard/kontron/kt690/romstage.c @@ -18,11 +18,6 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#define RC0 (6<<8) -#define RC1 (7<<8) - -#define SMBUS_HUB 0x71 - #include #include #include diff --git a/src/mainboard/siemens/sitemp_g1p1/romstage.c b/src/mainboard/siemens/sitemp_g1p1/romstage.c index 6d3652431b..6ae4989d15 100644 --- a/src/mainboard/siemens/sitemp_g1p1/romstage.c +++ b/src/mainboard/siemens/sitemp_g1p1/romstage.c @@ -19,15 +19,6 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#define RC0 (6<<8) -#define RC1 (7<<8) - -#define DIMM0 0x50 -#define DIMM1 0x51 - -#define ICS951462_ADDRESS 0x69 -#define SMBUS_HUB 0x71 - #include #include #include @@ -36,6 +27,7 @@ #include #include #include +#include #include #include "northbridge/amd/amdk8/raminit.h" diff --git a/src/mainboard/supermicro/h8scm_fam10/romstage.c b/src/mainboard/supermicro/h8scm_fam10/romstage.c index e6ce5a82bd..216e5df5f2 100644 --- a/src/mainboard/supermicro/h8scm_fam10/romstage.c +++ b/src/mainboard/supermicro/h8scm_fam10/romstage.c @@ -68,15 +68,6 @@ static int spd_read_byte(u32 device, u32 address) #include "northbridge/amd/amdfam10/early_ht.c" #include -//#include "spd_addr.h" - -#define RC00 0 - -#define DIMM0 0x50 -#define DIMM1 0x51 -#define DIMM2 0x52 -#define DIMM3 0x53 - void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { struct sys_info *sysinfo = &sysinfo_car; diff --git a/src/mainboard/technexion/tim5690/romstage.c b/src/mainboard/technexion/tim5690/romstage.c index 42c2599678..e6483c0e21 100644 --- a/src/mainboard/technexion/tim5690/romstage.c +++ b/src/mainboard/technexion/tim5690/romstage.c @@ -17,11 +17,6 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#define RC0 (6<<8) -#define RC1 (7<<8) - -#define SMBUS_HUB 0x71 - #include #include #include diff --git a/src/mainboard/technexion/tim8690/romstage.c b/src/mainboard/technexion/tim8690/romstage.c index 22a12125c8..2f3ad71562 100644 --- a/src/mainboard/technexion/tim8690/romstage.c +++ b/src/mainboard/technexion/tim8690/romstage.c @@ -17,11 +17,6 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#define RC0 (6<<8) -#define RC1 (7<<8) - -#define SMBUS_HUB 0x71 - #include #include #include -- cgit v1.2.3