From f69b46805c875c81af850af5567a18a934ce28bc Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Fri, 27 Apr 2012 23:12:08 +0200 Subject: acpigen: make acpigen_write_CST_package_entry non-static It's used by Sandybridge specific C state generation code. Change-Id: Ia6f1e14e748841a9646fd93d0a18f9e8f2a55e29 Signed-off-by: Stefan Reinauer Reviewed-on: http://review.coreboot.org/949 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich --- src/arch/x86/boot/acpigen.c | 2 +- src/arch/x86/include/arch/acpigen.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) (limited to 'src') diff --git a/src/arch/x86/boot/acpigen.c b/src/arch/x86/boot/acpigen.c index 34067bad56..04aeddfc01 100644 --- a/src/arch/x86/boot/acpigen.c +++ b/src/arch/x86/boot/acpigen.c @@ -448,7 +448,7 @@ int acpigen_write_PSD_package(u32 domain, u32 numprocs, PSD_coord coordtype) return len + lenh; } -static int acpigen_write_CST_package_entry(acpi_cstate_t *cstate) +int acpigen_write_CST_package_entry(acpi_cstate_t *cstate) { int len, len0; char *start, *end; diff --git a/src/arch/x86/include/arch/acpigen.h b/src/arch/x86/include/arch/acpigen.h index ae8aaf73c9..aebf508b5e 100644 --- a/src/arch/x86/include/arch/acpigen.h +++ b/src/arch/x86/include/arch/acpigen.h @@ -49,6 +49,7 @@ int acpigen_write_PSS_package(u32 coreFreq, u32 power, u32 transLat, u32 busmLat u32 control, u32 status); typedef enum { SW_ALL=0xfc, SW_ANY=0xfd, HW_ALL=0xfe } PSD_coord; int acpigen_write_PSD_package(u32 domain, u32 numprocs, PSD_coord coordtype); +int acpigen_write_CST_package_entry(acpi_cstate_t *cstate); int acpigen_write_CST_package(acpi_cstate_t *entry, int nentries); int acpigen_write_processor(u8 cpuindex, u32 pblock_addr, u8 pblock_len); int acpigen_write_TSS_package(int entries, acpi_tstate_t *tstate_list); -- cgit v1.2.3