From f3b86b3136960c954467a917a0df066b1c35c2aa Mon Sep 17 00:00:00 2001 From: Siyuan Wang Date: Thu, 1 Nov 2012 18:51:15 +0800 Subject: AMD agesa: add enable cache at the end of disable_cache_as_ram add this code according to src/include/cpu/x86/cache.h ,line 92, functin enable_cache() Change-Id: Ida96a98397eeed98dd61ca979e8c5a33bf00f9e5 Signed-off-by: Siyuan Wang Signed-off-by: Siyuan Wang Reviewed-on: http://review.coreboot.org/1662 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones --- src/cpu/amd/agesa/cache_as_ram.inc | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'src') diff --git a/src/cpu/amd/agesa/cache_as_ram.inc b/src/cpu/amd/agesa/cache_as_ram.inc index 389f7ec5f8..9b9be33db3 100755 --- a/src/cpu/amd/agesa/cache_as_ram.inc +++ b/src/cpu/amd/agesa/cache_as_ram.inc @@ -96,10 +96,14 @@ disable_cache_as_ram: AMD_DISABLE_STACK + /* enable cache */ + movl %cr0, %eax + andl $0x9fffffff, %eax + movl %eax, %cr0 + xorl %eax, %eax + /* Restore the return stack */ movd %xmm0, %esp ret cache_as_ram_setup_out: - - -- cgit v1.2.3