From f25e42c4f488a914737210db6ae570050e22f773 Mon Sep 17 00:00:00 2001
From: Mark Hsieh <mark_hsieh@wistron.corp-partner.google.com>
Date: Thu, 10 Mar 2022 22:03:52 +0800
Subject: mb/google/brya: set GPP_D0 to GPO
Based on the schematic carbine_adl-p_dvt_20211104.pdf, the GPP_D0 is
directly connected to FP module, Set GPP_D0 to GPO, DUT can flash FP
firmware successfully.
BUG=b:222188263, b:223906569
TEST=USE="project_gimble emerge-brya coreboot" and run the Fingerprint
Firmware Test.
Signed-off-by: Mark Hsieh <mark_hsieh@wistron.corp-partner.google.com>
Change-Id: I164ffff6bd3b4058d6e28247eb7c3ed46d3891b5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62739
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: YH Lin <yueherngl@google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
---
src/mainboard/google/brya/variants/baseboard/brya/gpio.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
(limited to 'src')
diff --git a/src/mainboard/google/brya/variants/baseboard/brya/gpio.c b/src/mainboard/google/brya/variants/baseboard/brya/gpio.c
index b8d1761fde..da0048aac2 100644
--- a/src/mainboard/google/brya/variants/baseboard/brya/gpio.c
+++ b/src/mainboard/google/brya/variants/baseboard/brya/gpio.c
@@ -118,7 +118,7 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_GPI_APIC(GPP_C7, NONE, PLTRST, LEVEL, NONE),
/* D0 : ISH_GP0 ==> PCH_FP_BOOT0 */
- PAD_NC_LOCK(GPP_D0, NONE, LOCK_CONFIG),
+ PAD_CFG_GPO_LOCK(GPP_D0, 0, LOCK_CONFIG),
/* D1 : ISH_GP1 ==> FP_RST_ODL */
PAD_CFG_GPO_LOCK(GPP_D1, 1, LOCK_CONFIG),
/* D2 : ISH_GP2 ==> EN_FP_PWR */
--
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