From f107b6c3a0beff0eea343d051dc460e033acd04c Mon Sep 17 00:00:00 2001
From: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Date: Fri, 13 Dec 2019 18:08:51 +0800
Subject: mb/google/hatch: Clean up duplicate method

Moving Enable/disable GPIO clock gating to soc level.

Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Change-Id: I9be77908b4e44e08a707812fd8b23b23bcb56671
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37691
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
---
 src/mainboard/google/hatch/dsdt.asl      |  3 --
 src/mainboard/google/hatch/mainboard.asl | 57 --------------------------------
 2 files changed, 60 deletions(-)
 delete mode 100644 src/mainboard/google/hatch/mainboard.asl

(limited to 'src')

diff --git a/src/mainboard/google/hatch/dsdt.asl b/src/mainboard/google/hatch/dsdt.asl
index 1e7f760a7b..8807191fcb 100644
--- a/src/mainboard/google/hatch/dsdt.asl
+++ b/src/mainboard/google/hatch/dsdt.asl
@@ -40,9 +40,6 @@ DefinitionBlock(
 			#include <soc/intel/cannonlake/acpi/northbridge.asl>
 			#include <soc/intel/cannonlake/acpi/southbridge.asl>
 		}
-
-		/* Mainboard hooks */
-		#include "mainboard.asl"
 	}
 
 #if CONFIG(CHROMEOS)
diff --git a/src/mainboard/google/hatch/mainboard.asl b/src/mainboard/google/hatch/mainboard.asl
deleted file mode 100644
index dff1a75959..0000000000
--- a/src/mainboard/google/hatch/mainboard.asl
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2019 Google, LLC
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <intelblocks/gpio.h>
-
-Method (LOCL, 1, Serialized)
-{
-	For (Local0 = 0, Local0 < 5, Local0++)
-	{
-		\_SB.PCI0.CGPM (Local0, Arg0)
-	}
-}
-
-/*
- * Method called from _PTS prior to system sleep state entry
- * Enables dynamic clock gating for all 5 GPIO communities
- */
-Method (MPTS, 1, Serialized)
-{
-	LOCL (MISCCFG_ENABLE_GPIO_PM_CONFIG)
-}
-
-/*
- * Method called from _WAK prior to system sleep state wakeup
- * Disables dynamic clock gating for all 5 GPIO communities
- */
-Method (MWAK, 1, Serialized)
-{
-	LOCL (0)
-}
-
-/*
- * S0ix Entry/Exit Notifications
- * Called from \_SB.LPID._DSM
- */
-Method (MS0X, 1, Serialized)
-{
-	If (Arg0 == 1) {
-		/* S0ix Entry */
-		LOCL (MISCCFG_ENABLE_GPIO_PM_CONFIG)
-	} Else {
-		/* S0ix Exit */
-		LOCL (0)
-	}
-}
-- 
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