From eac00d2dbbe57e10a130ea1c0c6d943c2a9f19c1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Fri, 21 Jun 2013 15:37:55 +0300 Subject: intel/sandybridge: Locate CBMEM TOC early in ramstage MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This patch allows the use of migrated CAR_GLOBAL variables from the very beginning of ramstage. Without the patch, CAR_GLOBALS were not available until northbridge set_resources(). Change-Id: Ifd4ab2ed52e07dcbe8c77e2e460dc483323e93c0 Signed-off-by: Kyösti Mälkki Reviewed-on: http://review.coreboot.org/3513 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/northbridge/intel/sandybridge/northbridge.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'src') diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c index 0a413b4c7b..d8e2e9d6b3 100644 --- a/src/northbridge/intel/sandybridge/northbridge.c +++ b/src/northbridge/intel/sandybridge/northbridge.c @@ -51,6 +51,21 @@ int bridge_silicon_revision(void) return bridge_revision_id; } +static unsigned long get_top_of_ram(void) +{ + /* Base of TSEG is top of usable DRAM */ + u32 tom = pci_read_config32(dev_find_slot(0, PCI_DEVFN(0,0)), TSEG); + return (unsigned long) tom; +} + +struct cbmem_entry *get_cbmem_toc(void) +{ + static struct cbmem_entry *toc = NULL; + if (!toc) + toc = (struct cbmem_entry *)(get_top_of_ram() - HIGH_MEMORY_SIZE); + return toc; +} + /* Reserve everything between A segment and 1MB: * * 0xa0000 - 0xbffff: legacy VGA -- cgit v1.2.3