From e78ae24eb1003f5fa22bd54365025dda78f37dda Mon Sep 17 00:00:00 2001 From: Scott Duplichan Date: Sun, 15 May 2011 21:18:59 +0000 Subject: Configure CIMx to use 33 MHz fast mode for SPD read. Signed-off-by: Scott Duplichan Acked-by: Marc Jones git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6576 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/southbridge/amd/cimx_wrapper/sb800/SBPLATFORM.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src') diff --git a/src/southbridge/amd/cimx_wrapper/sb800/SBPLATFORM.h b/src/southbridge/amd/cimx_wrapper/sb800/SBPLATFORM.h index 7efa5ecfe2..93e1c310e6 100644 --- a/src/southbridge/amd/cimx_wrapper/sb800/SBPLATFORM.h +++ b/src/southbridge/amd/cimx_wrapper/sb800/SBPLATFORM.h @@ -116,8 +116,8 @@ typedef union _PCI_ADDR { #define cimHpetTimerDefault TRUE #define cimHpetMsiDisDefault FALSE // Enable #define cimIrConfigDefault 0x00 // Disable -#define cimSpiFastReadEnableDefault 0x00 // Disable -#define cimSpiFastReadSpeedDefault 0x00 // NULL +#define cimSpiFastReadEnableDefault 0x01 // Enable +#define cimSpiFastReadSpeedDefault 0x01 // 33 MHz // GPP/AB Controller #define cimNbSbGen2Default TRUE #define cimAlinkPhyPllPowerDownDefault TRUE -- cgit v1.2.3