From e5eb75b9c0016b7f3b7be7fcefea288934ddb828 Mon Sep 17 00:00:00 2001 From: Mario Scheithauer Date: Tue, 4 Apr 2023 14:15:48 +0200 Subject: mb/siemens/mc_ehl4: Adjust USB settings Correct the USB settings, suitable for this mainboard. Change-Id: I943eb891e2f2d967acfd441c085063dbad49e993 Signed-off-by: Mario Scheithauer Reviewed-on: https://review.coreboot.org/c/coreboot/+/74651 Reviewed-by: Jan Samek Reviewed-by: Paul Menzel Reviewed-by: Werner Zeh Tested-by: build bot (Jenkins) --- src/mainboard/siemens/mc_ehl/variants/mc_ehl4/devicetree.cb | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src') diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/devicetree.cb index 52da98e2e2..5cc496f4b4 100644 --- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/devicetree.cb +++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/devicetree.cb @@ -20,9 +20,9 @@ chip soc/intel/elkhartlake }" # USB related UPDs - register "usb2_ports[0]" = "USB2_PORT_SHORT(OC_SKIP)" # USB3/2 Type A port 1 - register "usb2_ports[1]" = "USB2_PORT_SHORT(OC_SKIP)" # USB3/2 Type A Port 2 - register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # Onboard USB + register "usb2_ports[0]" = "USB2_PORT_SHORT(OC_SKIP)" # X125 + register "usb2_ports[1]" = "USB2_PORT_SHORT(OC_SKIP)" # X135 + register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # internal USB-OC register "usb2_ports[3]" = "USB2_PORT_EMPTY" # Port is unused register "usb2_ports[4]" = "USB2_PORT_EMPTY" # Port is unused register "usb2_ports[5]" = "USB2_PORT_EMPTY" # Port is unused @@ -32,7 +32,7 @@ chip soc/intel/elkhartlake register "usb2_ports[9]" = "USB2_PORT_EMPTY" # Port is unused register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/2 Type A port1 - register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/2 Type A port2 + register "usb3_ports[1]" = "USB3_PORT_EMPTY" # Port is not used register "usb3_ports[2]" = "USB3_PORT_EMPTY" # Port is not used register "usb3_ports[3]" = "USB3_PORT_EMPTY" # Port is not used -- cgit v1.2.3