From e54a8fd43247d767f16a37f3e3150b2915d809bc Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Wed, 6 Jul 2022 12:54:48 +0000 Subject: soc/intel/meteorlake: Add entry for GSPI2 device This patch adds GSPI2 (PCI device B0:D18:F6) entry into the chipset.cb. Additionally, increases `CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX` value to include GSPI2 as well. BUG=b:224325352 TEST=Able to build and boot Google/Rex platform. Signed-off-by: Subrata Banik Change-Id: I901128a1773fc6d2ba87e3e4972f45ad4a754d35 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65675 Reviewed-by: Tarun Tuli Reviewed-by: Kapil Porwal Tested-by: build bot (Jenkins) Reviewed-by: Eric Lai --- src/soc/intel/meteorlake/Kconfig | 2 +- src/soc/intel/meteorlake/chipset.cb | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) (limited to 'src') diff --git a/src/soc/intel/meteorlake/Kconfig b/src/soc/intel/meteorlake/Kconfig index c70e472d73..b2a094fbb8 100644 --- a/src/soc/intel/meteorlake/Kconfig +++ b/src/soc/intel/meteorlake/Kconfig @@ -208,7 +208,7 @@ config DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ config SOC_INTEL_COMMON_BLOCK_GSPI_MAX int - default 2 + default 3 config SOC_INTEL_I2C_DEV_MAX int diff --git a/src/soc/intel/meteorlake/chipset.cb b/src/soc/intel/meteorlake/chipset.cb index 546694048f..4784e3b38c 100644 --- a/src/soc/intel/meteorlake/chipset.cb +++ b/src/soc/intel/meteorlake/chipset.cb @@ -81,6 +81,7 @@ chip soc/intel/meteorlake device pci 10.0 alias thc0 off end device pci 10.1 alias thc1 off end device pci 12.0 alias ish off end + device pci 12.6 alias gspi2 off end device pci 12.7 alias ufs off end device pci 13.0 alias ioe_p2sb hidden end device pci 13.1 alias ieh2 off end -- cgit v1.2.3