From e437cb5f87a022c5e219ce1aadfd16a2078e0e86 Mon Sep 17 00:00:00 2001
From: Maximilian Brune <maximilian.brune@9elements.com>
Date: Mon, 15 Apr 2024 12:58:29 +0200
Subject: soc/sifive/fu540/chip.c: Add RAM resources

Add RAM region so that the payload can be placed in there without
coreboot complaining that the payload doesn't target a RAM region.

Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Change-Id: Id07eae3560ce69cd8a6a695702fa0b4463c50855
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81909
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
---
 src/mainboard/sifive/hifive-unleashed/devicetree.cb |  2 +-
 src/soc/sifive/fu540/chip.c                         | 12 ++++++++++++
 2 files changed, 13 insertions(+), 1 deletion(-)

(limited to 'src')

diff --git a/src/mainboard/sifive/hifive-unleashed/devicetree.cb b/src/mainboard/sifive/hifive-unleashed/devicetree.cb
index 796c232c2d..02d8dee58f 100644
--- a/src/mainboard/sifive/hifive-unleashed/devicetree.cb
+++ b/src/mainboard/sifive/hifive-unleashed/devicetree.cb
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-2.0-only
 
 chip soc/sifive/fu540
-	device cpu_cluster 0 on  end
+	device cpu_cluster 0 on ops fu540_cpu_ops end
 end
diff --git a/src/soc/sifive/fu540/chip.c b/src/soc/sifive/fu540/chip.c
index e33b4a3b0f..1733b20aa7 100644
--- a/src/soc/sifive/fu540/chip.c
+++ b/src/soc/sifive/fu540/chip.c
@@ -1,6 +1,18 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
+#include <cbmem.h>
 #include <device/device.h>
+#include <soc/addressmap.h>
+
+static void fu540_read_resources(struct device *dev)
+{
+	int index = 0;
+	ram_from_to(dev, index++, FU540_DRAM, (uintptr_t)cbmem_top());
+}
+
+struct device_operations fu540_cpu_ops = {
+	.read_resources = fu540_read_resources,
+};
 
 struct chip_operations soc_sifive_fu540_ops = {
 	.name = "SIFIVE FU540",
-- 
cgit v1.2.3