From e3a1247b15e756f01d9c25bc71fa2cf563de34a8 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Fri, 11 Sep 2020 15:47:09 +0200 Subject: include/console/uart: make index parameter unsigned The UART index is never negative, so make it unsigned and drop the checks for the index to be non-negative. Change-Id: I64bd60bd2a3b82552cb3ac6524792b9ac6c09a94 Signed-off-by: Felix Held Reviewed-on: https://review.coreboot.org/c/coreboot/+/45294 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson Reviewed-by: Aaron Durbin Reviewed-by: Furquan Shaikh --- src/drivers/uart/oxpcie_early.c | 4 ++-- src/drivers/uart/pl011.c | 8 ++++---- src/drivers/uart/sifive.c | 8 ++++---- src/drivers/uart/uart8250io.c | 10 +++++----- src/drivers/uart/uart8250mem.c | 8 ++++---- src/include/console/uart.h | 12 ++++++------ src/mainboard/emulation/qemu-aarch64/mmio.c | 2 +- src/mainboard/emulation/qemu-armv7/mmio.c | 2 +- src/mainboard/emulation/qemu-power8/uart.c | 10 +++++----- src/mainboard/emulation/qemu-riscv/uart.c | 2 +- src/mainboard/emulation/spike-riscv/uart.c | 2 +- src/soc/amd/picasso/uart_console.c | 2 +- src/soc/amd/stoneyridge/uart.c | 2 +- src/soc/cavium/cn81xx/uart.c | 2 +- src/soc/intel/common/block/uart/uart.c | 2 +- src/soc/intel/denverton_ns/uart_debug.c | 4 ++-- src/soc/intel/quark/uart_common.c | 2 +- src/soc/mediatek/common/uart.c | 8 ++++---- src/soc/nvidia/tegra124/uart.c | 12 ++++++------ src/soc/nvidia/tegra210/uart.c | 8 ++++---- src/soc/qualcomm/ipq40xx/uart.c | 8 ++++---- src/soc/qualcomm/ipq806x/uart.c | 8 ++++---- src/soc/qualcomm/qcs405/uart.c | 8 ++++---- src/soc/qualcomm/sc7180/qupv3_uart.c | 10 +++++----- src/soc/qualcomm/sc7180/uart_bitbang.c | 8 ++++---- src/soc/qualcomm/sdm845/uart_bitbang.c | 8 ++++---- src/soc/rockchip/common/uart.c | 2 +- src/soc/samsung/exynos5250/uart.c | 10 +++++----- src/soc/samsung/exynos5420/uart.c | 10 +++++----- src/soc/sifive/fu540/uart.c | 2 +- src/soc/ti/am335x/uart.c | 10 +++++----- src/southbridge/amd/pi/hudson/uart.c | 2 +- 32 files changed, 98 insertions(+), 98 deletions(-) (limited to 'src') diff --git a/src/drivers/uart/oxpcie_early.c b/src/drivers/uart/oxpcie_early.c index b012c5a77a..ff7d0cfd8a 100644 --- a/src/drivers/uart/oxpcie_early.c +++ b/src/drivers/uart/oxpcie_early.c @@ -55,9 +55,9 @@ static int oxpcie_uart_active(void) return oxpcie_present; } -uintptr_t uart_platform_base(int idx) +uintptr_t uart_platform_base(unsigned int idx) { - if ((idx >= 0) && (idx < 8) && oxpcie_uart_active()) + if ((idx < 8) && oxpcie_uart_active()) return uart0_base + idx * 0x200; return 0; } diff --git a/src/drivers/uart/pl011.c b/src/drivers/uart/pl011.c index 2b81e76693..0a73d829ad 100644 --- a/src/drivers/uart/pl011.c +++ b/src/drivers/uart/pl011.c @@ -5,11 +5,11 @@ #include #include -void uart_init(int idx) +void uart_init(unsigned int idx) { } -void uart_tx_byte(int idx, unsigned char data) +void uart_tx_byte(unsigned int idx, unsigned char data) { struct pl011_uart *regs = uart_platform_baseptr(idx); @@ -17,7 +17,7 @@ void uart_tx_byte(int idx, unsigned char data) uart_tx_flush(idx); } -void uart_tx_flush(int idx) +void uart_tx_flush(unsigned int idx) { struct pl011_uart *regs = uart_platform_baseptr(idx); @@ -26,7 +26,7 @@ void uart_tx_flush(int idx) ; } -unsigned char uart_rx_byte(int idx) +unsigned char uart_rx_byte(unsigned int idx) { struct pl011_uart *regs = uart_platform_baseptr(idx); diff --git a/src/drivers/uart/sifive.c b/src/drivers/uart/sifive.c index 0c94c6aeaa..31181aa51f 100644 --- a/src/drivers/uart/sifive.c +++ b/src/drivers/uart/sifive.c @@ -45,7 +45,7 @@ static void sifive_uart_init(struct sifive_uart_registers *regs, int div) write32(®s->rxctrl, RXCTRL_RXEN|RXCTRL_RXCNT(0)); } -void uart_init(int idx) +void uart_init(unsigned int idx) { unsigned int div; div = uart_baudrate_divisor(get_uart_baudrate(), @@ -58,7 +58,7 @@ static bool uart_can_tx(struct sifive_uart_registers *regs) return !(read32(®s->txdata) & TXDATA_FULL); } -void uart_tx_byte(int idx, unsigned char data) +void uart_tx_byte(unsigned int idx, unsigned char data) { struct sifive_uart_registers *regs = uart_platform_baseptr(idx); @@ -68,7 +68,7 @@ void uart_tx_byte(int idx, unsigned char data) write32(®s->txdata, data); } -void uart_tx_flush(int idx) +void uart_tx_flush(unsigned int idx) { struct sifive_uart_registers *regs = uart_platform_baseptr(idx); uint32_t ip; @@ -79,7 +79,7 @@ void uart_tx_flush(int idx) } while (!(ip & IP_TXWM)); } -unsigned char uart_rx_byte(int idx) +unsigned char uart_rx_byte(unsigned int idx) { struct sifive_uart_registers *regs = uart_platform_baseptr(idx); uint32_t rxdata; diff --git a/src/drivers/uart/uart8250io.c b/src/drivers/uart/uart8250io.c index 22b79e8b6b..d0841de39c 100644 --- a/src/drivers/uart/uart8250io.c +++ b/src/drivers/uart/uart8250io.c @@ -77,14 +77,14 @@ static void uart8250_init(unsigned int base_port, unsigned int divisor) static const unsigned int bases[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; -uintptr_t uart_platform_base(int idx) +uintptr_t uart_platform_base(unsigned int idx) { if (idx < ARRAY_SIZE(bases)) return bases[idx]; return 0; } -void uart_init(int idx) +void uart_init(unsigned int idx) { if (!CONFIG(DRIVERS_UART_8250IO_SKIP_INIT)) { unsigned int div; @@ -94,17 +94,17 @@ void uart_init(int idx) } } -void uart_tx_byte(int idx, unsigned char data) +void uart_tx_byte(unsigned int idx, unsigned char data) { uart8250_tx_byte(uart_platform_base(idx), data); } -unsigned char uart_rx_byte(int idx) +unsigned char uart_rx_byte(unsigned int idx) { return uart8250_rx_byte(uart_platform_base(idx)); } -void uart_tx_flush(int idx) +void uart_tx_flush(unsigned int idx) { uart8250_tx_flush(uart_platform_base(idx)); } diff --git a/src/drivers/uart/uart8250mem.c b/src/drivers/uart/uart8250mem.c index 8d73272031..1834095014 100644 --- a/src/drivers/uart/uart8250mem.c +++ b/src/drivers/uart/uart8250mem.c @@ -97,7 +97,7 @@ static void uart8250_mem_init(void *base, unsigned int divisor) uart8250_write(base, UART8250_LCR, CONFIG_TTYS0_LCS); } -void uart_init(int idx) +void uart_init(unsigned int idx) { void *base = uart_platform_baseptr(idx); if (!base) @@ -109,7 +109,7 @@ void uart_init(int idx) uart8250_mem_init(base, div); } -void uart_tx_byte(int idx, unsigned char data) +void uart_tx_byte(unsigned int idx, unsigned char data) { void *base = uart_platform_baseptr(idx); if (!base) @@ -117,7 +117,7 @@ void uart_tx_byte(int idx, unsigned char data) uart8250_mem_tx_byte(base, data); } -unsigned char uart_rx_byte(int idx) +unsigned char uart_rx_byte(unsigned int idx) { void *base = uart_platform_baseptr(idx); if (!base) @@ -125,7 +125,7 @@ unsigned char uart_rx_byte(int idx) return uart8250_mem_rx_byte(base); } -void uart_tx_flush(int idx) +void uart_tx_flush(unsigned int idx) { void *base = uart_platform_baseptr(idx); if (!base) diff --git a/src/include/console/uart.h b/src/include/console/uart.h index 9d37886ccd..6126a89d57 100644 --- a/src/include/console/uart.h +++ b/src/include/console/uart.h @@ -35,14 +35,14 @@ unsigned int uart_input_clock_divider(void); /* Bitbang out one byte on an 8n1 UART through the output function set_tx(). */ void uart_bitbang_tx_byte(unsigned char data, void (*set_tx)(int line_state)); -void uart_init(int idx); -void uart_tx_byte(int idx, unsigned char data); -void uart_tx_flush(int idx); -unsigned char uart_rx_byte(int idx); +void uart_init(unsigned int idx); +void uart_tx_byte(unsigned int idx, unsigned char data); +void uart_tx_flush(unsigned int idx); +unsigned char uart_rx_byte(unsigned int idx); -uintptr_t uart_platform_base(int idx); +uintptr_t uart_platform_base(unsigned int idx); -static inline void *uart_platform_baseptr(int idx) +static inline void *uart_platform_baseptr(unsigned int idx) { return (void *)uart_platform_base(idx); } diff --git a/src/mainboard/emulation/qemu-aarch64/mmio.c b/src/mainboard/emulation/qemu-aarch64/mmio.c index 0cffc282ec..0fac64d234 100644 --- a/src/mainboard/emulation/qemu-aarch64/mmio.c +++ b/src/mainboard/emulation/qemu-aarch64/mmio.c @@ -3,7 +3,7 @@ #include #include -uintptr_t uart_platform_base(int idx) +uintptr_t uart_platform_base(unsigned int idx) { return VIRT_UART_BASE; } diff --git a/src/mainboard/emulation/qemu-armv7/mmio.c b/src/mainboard/emulation/qemu-armv7/mmio.c index 3f239153db..0f07e7f1ef 100644 --- a/src/mainboard/emulation/qemu-armv7/mmio.c +++ b/src/mainboard/emulation/qemu-armv7/mmio.c @@ -4,7 +4,7 @@ #define VEXPRESS_UART0_IO_ADDRESS (0x10009000) -uintptr_t uart_platform_base(int idx) +uintptr_t uart_platform_base(unsigned int idx) { return VEXPRESS_UART0_IO_ADDRESS; } diff --git a/src/mainboard/emulation/qemu-power8/uart.c b/src/mainboard/emulation/qemu-power8/uart.c index c6d7e40fef..4b1bf3287e 100644 --- a/src/mainboard/emulation/qemu-power8/uart.c +++ b/src/mainboard/emulation/qemu-power8/uart.c @@ -5,26 +5,26 @@ #include static uint8_t *buf = (void *)0; -uintptr_t uart_platform_base(int idx) +uintptr_t uart_platform_base(unsigned int idx) { return (uintptr_t) buf; } -void uart_init(int idx) +void uart_init(unsigned int idx) { } -unsigned char uart_rx_byte(int idx) +unsigned char uart_rx_byte(unsigned int idx) { return 0; } -void uart_tx_byte(int idx, unsigned char data) +void uart_tx_byte(unsigned int idx, unsigned char data) { } -void uart_tx_flush(int idx) +void uart_tx_flush(unsigned int idx) { } diff --git a/src/mainboard/emulation/qemu-riscv/uart.c b/src/mainboard/emulation/qemu-riscv/uart.c index 4eee12b933..19a2b0016c 100644 --- a/src/mainboard/emulation/qemu-riscv/uart.c +++ b/src/mainboard/emulation/qemu-riscv/uart.c @@ -4,7 +4,7 @@ #include #include -uintptr_t uart_platform_base(int idx) +uintptr_t uart_platform_base(unsigned int idx) { return (uintptr_t) QEMU_VIRT_UART0; } diff --git a/src/mainboard/emulation/spike-riscv/uart.c b/src/mainboard/emulation/spike-riscv/uart.c index d6e0510274..efefc52d62 100644 --- a/src/mainboard/emulation/spike-riscv/uart.c +++ b/src/mainboard/emulation/spike-riscv/uart.c @@ -3,7 +3,7 @@ #include #include -uintptr_t uart_platform_base(int idx) +uintptr_t uart_platform_base(unsigned int idx) { return (uintptr_t) 0x02100000; } diff --git a/src/soc/amd/picasso/uart_console.c b/src/soc/amd/picasso/uart_console.c index 3ab2a70920..b5c5159486 100644 --- a/src/soc/amd/picasso/uart_console.c +++ b/src/soc/amd/picasso/uart_console.c @@ -8,7 +8,7 @@ * be provided exactly once and only by the UART that is used for console. */ -uintptr_t uart_platform_base(int idx) +uintptr_t uart_platform_base(unsigned int idx) { return get_uart_base(idx); } diff --git a/src/soc/amd/stoneyridge/uart.c b/src/soc/amd/stoneyridge/uart.c index ab129c5f05..73346ab658 100644 --- a/src/soc/amd/stoneyridge/uart.c +++ b/src/soc/amd/stoneyridge/uart.c @@ -3,7 +3,7 @@ #include #include -uintptr_t uart_platform_base(int idx) +uintptr_t uart_platform_base(unsigned int idx) { if (CONFIG_UART_FOR_CONSOLE < 0 || CONFIG_UART_FOR_CONSOLE > 1) return 0; diff --git a/src/soc/cavium/cn81xx/uart.c b/src/soc/cavium/cn81xx/uart.c index 03f94d57ac..4e5fd82a37 100644 --- a/src/soc/cavium/cn81xx/uart.c +++ b/src/soc/cavium/cn81xx/uart.c @@ -94,7 +94,7 @@ unsigned int uart_platform_refclk(void) return uart_hclk(uart); } -uintptr_t uart_platform_base(int idx) +uintptr_t uart_platform_base(unsigned int idx) { return CONFIG_CONSOLE_SERIAL_UART_ADDRESS; } diff --git a/src/soc/intel/common/block/uart/uart.c b/src/soc/intel/common/block/uart/uart.c index 5507663a5a..142a9365a9 100644 --- a/src/soc/intel/common/block/uart/uart.c +++ b/src/soc/intel/common/block/uart/uart.c @@ -37,7 +37,7 @@ static void uart_lpss_init(const struct device *dev, uintptr_t baseaddr) } #if CONFIG(INTEL_LPSS_UART_FOR_CONSOLE) -uintptr_t uart_platform_base(int idx) +uintptr_t uart_platform_base(unsigned int idx) { if (idx == CONFIG_UART_FOR_CONSOLE) return CONFIG_CONSOLE_UART_BASE_ADDRESS; diff --git a/src/soc/intel/denverton_ns/uart_debug.c b/src/soc/intel/denverton_ns/uart_debug.c index 8ee02cca7f..acd1f038c3 100644 --- a/src/soc/intel/denverton_ns/uart_debug.c +++ b/src/soc/intel/denverton_ns/uart_debug.c @@ -8,9 +8,9 @@ #define MY_PCI_DEV(SEGBUS, DEV, FN) \ ((((SEGBUS)&0xFFF) << 20) | (((DEV)&0x1F) << 15) | (((FN)&0x07) << 12)) -uintptr_t uart_platform_base(int idx); +uintptr_t uart_platform_base(unsigned int idx); -uintptr_t uart_platform_base(int idx) +uintptr_t uart_platform_base(unsigned int idx) { return (uintptr_t)pci_io_read_config32( MY_PCI_DEV(0, CONFIG_HSUART_DEV, idx), diff --git a/src/soc/intel/quark/uart_common.c b/src/soc/intel/quark/uart_common.c index 8696277ce1..19ca745ca1 100644 --- a/src/soc/intel/quark/uart_common.c +++ b/src/soc/intel/quark/uart_common.c @@ -8,7 +8,7 @@ unsigned int uart_platform_refclk(void) return 44236800; } -uintptr_t uart_platform_base(int idx) +uintptr_t uart_platform_base(unsigned int idx) { return UART_BASE_ADDRESS; } diff --git a/src/soc/mediatek/common/uart.c b/src/soc/mediatek/common/uart.c index 99cba13b24..ba3c71a8c6 100644 --- a/src/soc/mediatek/common/uart.c +++ b/src/soc/mediatek/common/uart.c @@ -139,22 +139,22 @@ static int mtk_uart_tst_byte(void) return (read8(&uart_ptr->lsr) & UART8250_LSR_DR) == UART8250_LSR_DR; } -void uart_init(int idx) +void uart_init(unsigned int idx) { mtk_uart_init(); } -unsigned char uart_rx_byte(int idx) +unsigned char uart_rx_byte(unsigned int idx) { return mtk_uart_rx_byte(); } -void uart_tx_byte(int idx, unsigned char data) +void uart_tx_byte(unsigned int idx, unsigned char data) { mtk_uart_tx_byte(data); } -void uart_tx_flush(int idx) +void uart_tx_flush(unsigned int idx) { mtk_uart_tx_flush(); } diff --git a/src/soc/nvidia/tegra124/uart.c b/src/soc/nvidia/tegra124/uart.c index d016cc2618..4f24c0da66 100644 --- a/src/soc/nvidia/tegra124/uart.c +++ b/src/soc/nvidia/tegra124/uart.c @@ -76,12 +76,12 @@ static int tegra124_uart_tst_byte(struct tegra124_uart *uart_ptr) return (read8(&uart_ptr->lsr) & UART8250_LSR_DR) == UART8250_LSR_DR; } -uintptr_t uart_platform_base(int idx) +uintptr_t uart_platform_base(unsigned int idx) { //Default to UART A unsigned int base = 0x70006000; //UARTs A - E are mapped as index 0 - 4 - if ((idx < 5) && (idx >= 0)) { + if ((idx < 5)) { if (idx != 1) { //not UART B base += idx * 0x100; } else { @@ -91,25 +91,25 @@ uintptr_t uart_platform_base(int idx) return base; } -void uart_init(int idx) +void uart_init(unsigned int idx) { struct tegra124_uart *uart_ptr = uart_platform_baseptr(idx); tegra124_uart_init(uart_ptr); } -unsigned char uart_rx_byte(int idx) +unsigned char uart_rx_byte(unsigned int idx) { struct tegra124_uart *uart_ptr = uart_platform_baseptr(idx); return tegra124_uart_rx_byte(uart_ptr); } -void uart_tx_byte(int idx, unsigned char data) +void uart_tx_byte(unsigned int idx, unsigned char data) { struct tegra124_uart *uart_ptr = uart_platform_baseptr(idx); tegra124_uart_tx_byte(uart_ptr, data); } -void uart_tx_flush(int idx) +void uart_tx_flush(unsigned int idx) { struct tegra124_uart *uart_ptr = uart_platform_baseptr(idx); tegra124_uart_tx_flush(uart_ptr); diff --git a/src/soc/nvidia/tegra210/uart.c b/src/soc/nvidia/tegra210/uart.c index 865e1fafe1..7dbaf7b207 100644 --- a/src/soc/nvidia/tegra210/uart.c +++ b/src/soc/nvidia/tegra210/uart.c @@ -82,22 +82,22 @@ static int tegra210_uart_tst_byte(void) return (read8(&uart_ptr->lsr) & UART8250_LSR_DR) == UART8250_LSR_DR; } -void uart_init(int idx) +void uart_init(unsigned int idx) { tegra210_uart_init(); } -void uart_tx_byte(int idx, unsigned char data) +void uart_tx_byte(unsigned int idx, unsigned char data) { tegra210_uart_tx_byte(data); } -void uart_tx_flush(int idx) +void uart_tx_flush(unsigned int idx) { tegra210_uart_tx_flush(); } -unsigned char uart_rx_byte(int idx) +unsigned char uart_rx_byte(unsigned int idx) { return tegra210_uart_rx_byte(); } diff --git a/src/soc/qualcomm/ipq40xx/uart.c b/src/soc/qualcomm/ipq40xx/uart.c index 265c25e28b..9c506111fa 100644 --- a/src/soc/qualcomm/ipq40xx/uart.c +++ b/src/soc/qualcomm/ipq40xx/uart.c @@ -87,7 +87,7 @@ static int valid_data = 0; /* Received data */ static unsigned int word = 0; -void uart_tx_byte(int idx, unsigned char data) +void uart_tx_byte(unsigned int idx, unsigned char data) { int num_of_chars = 1; void *base = uart_board_param.uart_dm_base; @@ -195,7 +195,7 @@ unsigned int msm_boot_uart_dm_init(void *uart_dm_base) * * Initializes clocks, GPIO and UART controller. */ -void uart_init(int idx) +void uart_init(unsigned int idx) { /* Note int idx isn't used in this driver. */ void *dm_base; @@ -230,7 +230,7 @@ void ipq40xx_uart_init(void) * @brief uart_tx_flush - transmits a string of data * @param idx: string to transmit */ -void uart_tx_flush(int idx) +void uart_tx_flush(unsigned int idx) { void *base = uart_board_param.uart_dm_base; @@ -244,7 +244,7 @@ void uart_tx_flush(int idx) * * Returns the character read from serial port. */ -uint8_t uart_rx_byte(int idx) +uint8_t uart_rx_byte(unsigned int idx) { uint8_t byte; diff --git a/src/soc/qualcomm/ipq806x/uart.c b/src/soc/qualcomm/ipq806x/uart.c index ea564b3527..3a3a8bf27b 100644 --- a/src/soc/qualcomm/ipq806x/uart.c +++ b/src/soc/qualcomm/ipq806x/uart.c @@ -160,7 +160,7 @@ msm_boot_uart_dm_read(unsigned int *data, int *count, int wait) } #endif -void uart_tx_byte(int idx, unsigned char data) +void uart_tx_byte(unsigned int idx, unsigned char data) { int num_of_chars = 1; unsigned int tx_data = 0; @@ -269,7 +269,7 @@ static unsigned int msm_boot_uart_dm_init(void *uart_dm_base) * * Initializes clocks, GPIO and UART controller. */ -void uart_init(int idx) +void uart_init(unsigned int idx) { /* Note int idx isn't used in this driver. */ void *dm_base; @@ -316,7 +316,7 @@ uint32_t uartmem_getbaseaddr(void) * uart_tx_flush - transmits a string of data * @s: string to transmit */ -void uart_tx_flush(int idx) +void uart_tx_flush(unsigned int idx) { void *base = uart_board_param.uart_dm_base; @@ -351,7 +351,7 @@ int uart_can_rx_byte(void) * * Returns the character read from serial port. */ -uint8_t uart_rx_byte(int idx) +uint8_t uart_rx_byte(unsigned int idx) { uint8_t byte; diff --git a/src/soc/qualcomm/qcs405/uart.c b/src/soc/qualcomm/qcs405/uart.c index 1229053783..ac72998cb6 100644 --- a/src/soc/qualcomm/qcs405/uart.c +++ b/src/soc/qualcomm/qcs405/uart.c @@ -90,7 +90,7 @@ static int valid_data = 0; static unsigned int word = 0; -void uart_tx_byte(int idx, unsigned char data) +void uart_tx_byte(unsigned int idx, unsigned char data) { int num_of_chars = 1; void *base = uart_board_param.uart_dm_base; @@ -199,7 +199,7 @@ unsigned int msm_boot_uart_dm_init(void *uart_dm_base) * * Initializes clocks, GPIO and UART controller. */ -void uart_init(int idx) +void uart_init(unsigned int idx) { /* Note int idx isn't used in this driver. */ void *dm_base; @@ -231,7 +231,7 @@ void qcs405_uart_init(void) * @brief uart_tx_flush - transmits a string of data * @param idx: string to transmit */ -void uart_tx_flush(int idx) +void uart_tx_flush(unsigned int idx) { void *base = uart_board_param.uart_dm_base; @@ -246,7 +246,7 @@ void uart_tx_flush(int idx) * * Returns the character read from serial port. */ -uint8_t uart_rx_byte(int idx) +uint8_t uart_rx_byte(unsigned int idx) { uint8_t byte; diff --git a/src/soc/qualcomm/sc7180/qupv3_uart.c b/src/soc/qualcomm/sc7180/qupv3_uart.c index f9d99bb71e..bf274c23c9 100644 --- a/src/soc/qualcomm/sc7180/qupv3_uart.c +++ b/src/soc/qualcomm/sc7180/qupv3_uart.c @@ -34,7 +34,7 @@ #define UART_RX_PACK_VECTOR0 0xF #define UART_RX_PACK_VECTOR2 0x00 -void uart_tx_flush(int idx) +void uart_tx_flush(unsigned int idx) { struct qup_regs *regs = qup[idx].regs; @@ -43,7 +43,7 @@ void uart_tx_flush(int idx) ; } -void uart_init(int idx) +void uart_init(unsigned int idx) { struct qup_regs *regs = qup[idx].regs; unsigned int reg_value; @@ -113,7 +113,7 @@ void uart_init(int idx) write32(®s->geni_s_cmd0, START_UART_RX); } -unsigned char uart_rx_byte(int idx) +unsigned char uart_rx_byte(unsigned int idx) { struct qup_regs *regs = qup[idx].regs; @@ -122,7 +122,7 @@ unsigned char uart_rx_byte(int idx) return 0; } -void uart_tx_byte(int idx, unsigned char data) +void uart_tx_byte(unsigned int idx, unsigned char data) { struct qup_regs *regs = qup[idx].regs; @@ -134,7 +134,7 @@ void uart_tx_byte(int idx, unsigned char data) write32(®s->geni_tx_fifon, data); } -uintptr_t uart_platform_base(int idx) +uintptr_t uart_platform_base(unsigned int idx) { return (uintptr_t)qup[idx].regs; } diff --git a/src/soc/qualcomm/sc7180/uart_bitbang.c b/src/soc/qualcomm/sc7180/uart_bitbang.c index b3a6cd5870..7d88a20986 100644 --- a/src/soc/qualcomm/sc7180/uart_bitbang.c +++ b/src/soc/qualcomm/sc7180/uart_bitbang.c @@ -16,22 +16,22 @@ static void set_tx(int line_state) gpio_set(UART_TX_PIN, line_state); } -void uart_init(int idx) +void uart_init(unsigned int idx) { gpio_output(UART_TX_PIN, 1); } -void uart_tx_byte(int idx, unsigned char data) +void uart_tx_byte(unsigned int idx, unsigned char data) { uart_bitbang_tx_byte(data, set_tx); } -void uart_tx_flush(int idx) +void uart_tx_flush(unsigned int idx) { /* unnecessary, PIO Tx means transaction is over when tx_byte returns */ } -unsigned char uart_rx_byte(int idx) +unsigned char uart_rx_byte(unsigned int idx) { return 0; /* not implemented */ } diff --git a/src/soc/qualcomm/sdm845/uart_bitbang.c b/src/soc/qualcomm/sdm845/uart_bitbang.c index b78db833a4..8d7138e5d1 100644 --- a/src/soc/qualcomm/sdm845/uart_bitbang.c +++ b/src/soc/qualcomm/sdm845/uart_bitbang.c @@ -10,22 +10,22 @@ static void set_tx(int line_state) gpio_set(UART_TX_PIN, line_state); } -void uart_init(int idx) +void uart_init(unsigned int idx) { gpio_output(UART_TX_PIN, 1); } -void uart_tx_byte(int idx, unsigned char data) +void uart_tx_byte(unsigned int idx, unsigned char data) { uart_bitbang_tx_byte(data, set_tx); } -void uart_tx_flush(int idx) +void uart_tx_flush(unsigned int idx) { /* unnecessary, PIO Tx means transaction is over when tx_byte returns */ } -unsigned char uart_rx_byte(int idx) +unsigned char uart_rx_byte(unsigned int idx) { return 0; /* not implemented */ } diff --git a/src/soc/rockchip/common/uart.c b/src/soc/rockchip/common/uart.c index 2c6d6cec68..b98f182d7c 100644 --- a/src/soc/rockchip/common/uart.c +++ b/src/soc/rockchip/common/uart.c @@ -9,7 +9,7 @@ unsigned int uart_platform_refclk(void) return OSC_HZ; } -uintptr_t uart_platform_base(int idx) +uintptr_t uart_platform_base(unsigned int idx) { return CONFIG_CONSOLE_SERIAL_UART_ADDRESS; } diff --git a/src/soc/samsung/exynos5250/uart.c b/src/soc/samsung/exynos5250/uart.c index 326312576b..ef03c04f23 100644 --- a/src/soc/samsung/exynos5250/uart.c +++ b/src/soc/samsung/exynos5250/uart.c @@ -100,7 +100,7 @@ static void exynos5_uart_tx_flush(struct s5p_uart *uart) while (read32(&uart->ufstat) & 0x1ff0000); } -uintptr_t uart_platform_base(int idx) +uintptr_t uart_platform_base(unsigned int idx) { if (idx < 4) return 0x12c00000 + idx * 0x10000; @@ -108,25 +108,25 @@ uintptr_t uart_platform_base(int idx) return 0; } -void uart_init(int idx) +void uart_init(unsigned int idx) { struct s5p_uart *uart = uart_platform_baseptr(idx); exynos5_init_dev(uart); } -unsigned char uart_rx_byte(int idx) +unsigned char uart_rx_byte(unsigned int idx) { struct s5p_uart *uart = uart_platform_baseptr(idx); return exynos5_uart_rx_byte(uart); } -void uart_tx_byte(int idx, unsigned char data) +void uart_tx_byte(unsigned int idx, unsigned char data) { struct s5p_uart *uart = uart_platform_baseptr(idx); exynos5_uart_tx_byte(uart, data); } -void uart_tx_flush(int idx) +void uart_tx_flush(unsigned int idx) { struct s5p_uart *uart = uart_platform_baseptr(idx); exynos5_uart_tx_flush(uart); diff --git a/src/soc/samsung/exynos5420/uart.c b/src/soc/samsung/exynos5420/uart.c index c7a0649f5d..16a4b11da3 100644 --- a/src/soc/samsung/exynos5420/uart.c +++ b/src/soc/samsung/exynos5420/uart.c @@ -92,7 +92,7 @@ static void exynos5_uart_tx_byte(struct s5p_uart *uart, unsigned char data) write8(&uart->utxh, data); } -uintptr_t uart_platform_base(int idx) +uintptr_t uart_platform_base(unsigned int idx) { if (idx < 4) return 0x12c00000 + idx * 0x10000; @@ -100,25 +100,25 @@ uintptr_t uart_platform_base(int idx) return 0; } -void uart_init(int idx) +void uart_init(unsigned int idx) { struct s5p_uart *uart = uart_platform_baseptr(idx); exynos5_init_dev(uart); } -unsigned char uart_rx_byte(int idx) +unsigned char uart_rx_byte(unsigned int idx) { struct s5p_uart *uart = uart_platform_baseptr(idx); return exynos5_uart_rx_byte(uart); } -void uart_tx_byte(int idx, unsigned char data) +void uart_tx_byte(unsigned int idx, unsigned char data) { struct s5p_uart *uart = uart_platform_baseptr(idx); exynos5_uart_tx_byte(uart, data); } -void uart_tx_flush(int idx) +void uart_tx_flush(unsigned int idx) { /* Exynos5250 implements this too. */ } diff --git a/src/soc/sifive/fu540/uart.c b/src/soc/sifive/fu540/uart.c index c35e0f6166..353f6cd624 100644 --- a/src/soc/sifive/fu540/uart.c +++ b/src/soc/sifive/fu540/uart.c @@ -6,7 +6,7 @@ #include #include -uintptr_t uart_platform_base(int idx) +uintptr_t uart_platform_base(unsigned int idx) { if (idx < 2) return FU540_UART(idx); diff --git a/src/soc/ti/am335x/uart.c b/src/soc/ti/am335x/uart.c index 90095d47d9..e3648a93a6 100644 --- a/src/soc/ti/am335x/uart.c +++ b/src/soc/ti/am335x/uart.c @@ -135,7 +135,7 @@ unsigned int uart_platform_refclk(void) return 48000000; } -uintptr_t uart_platform_base(int idx) +uintptr_t uart_platform_base(unsigned int idx) { const unsigned int bases[] = { 0x44e09000, 0x48022000, 0x48024000, @@ -146,7 +146,7 @@ uintptr_t uart_platform_base(int idx) return 0; } -void uart_init(int idx) +void uart_init(unsigned int idx) { struct am335x_uart *uart = uart_platform_baseptr(idx); uint16_t div = (uint16_t) uart_baudrate_divisor( @@ -154,19 +154,19 @@ void uart_init(int idx) am335x_uart_init(uart, div); } -unsigned char uart_rx_byte(int idx) +unsigned char uart_rx_byte(unsigned int idx) { struct am335x_uart *uart = uart_platform_baseptr(idx); return am335x_uart_rx_byte(uart); } -void uart_tx_byte(int idx, unsigned char data) +void uart_tx_byte(unsigned int idx, unsigned char data) { struct am335x_uart *uart = uart_platform_baseptr(idx); am335x_uart_tx_byte(uart, data); } -void uart_tx_flush(int idx) +void uart_tx_flush(unsigned int idx) { } diff --git a/src/southbridge/amd/pi/hudson/uart.c b/src/southbridge/amd/pi/hudson/uart.c index 2d28210569..996215de34 100644 --- a/src/southbridge/amd/pi/hudson/uart.c +++ b/src/southbridge/amd/pi/hudson/uart.c @@ -2,7 +2,7 @@ #include -uintptr_t uart_platform_base(int idx) +uintptr_t uart_platform_base(unsigned int idx) { return (uintptr_t)(0xFEDC6000 + 0x2000 * (idx & 1)); } -- cgit v1.2.3