From e1eef694ea6a055ab5f6dc792847702aced5a2ad Mon Sep 17 00:00:00 2001 From: Vladimir Serbinenko Date: Wed, 19 Feb 2014 22:08:51 +0100 Subject: intel/nehalem: Use non-powercycle reset. Change-Id: Ibc2421a50e272a580461e4eacec6cfcd38654fe8 Signed-off-by: Vladimir Serbinenko Reviewed-on: http://review.coreboot.org/5266 Reviewed-by: Alexandru Gagniuc Tested-by: build bot (Jenkins) --- src/northbridge/intel/nehalem/raminit.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src') diff --git a/src/northbridge/intel/nehalem/raminit.c b/src/northbridge/intel/nehalem/raminit.c index c967e3979f..46a15a9271 100644 --- a/src/northbridge/intel/nehalem/raminit.c +++ b/src/northbridge/intel/nehalem/raminit.c @@ -3804,7 +3804,7 @@ void chipset_init(const int s3resume) if ((x2ca8 & 1) || (x2ca8 == 8 && !s3resume)) { printk(BIOS_DEBUG, "soft reset detected, rebooting properly\n"); write_mchbar8(0x2ca8, 0); - outb(0xe, 0xcf9); + outb(0x6, 0xcf9); #if REAL while (1) { asm volatile ("hlt"); -- cgit v1.2.3