From e1c7cd9fb7be3d4f7ecd07fa1ca7ddf60553b875 Mon Sep 17 00:00:00 2001 From: John Su Date: Fri, 4 Dec 2020 10:39:25 +0800 Subject: mb/google/zork/var/vilboz: Update telemetry settings Update telemetry settings. VDD Slope : 32643 -> 26939 VDD Offset: 208 -> 125 SOC Slope : 22742 -> 20001 SOC Offset: -83 -> 168 BUG=b:171668654 BRANCH=zork TEST=1. emerge-zork coreboot 2. pass AMD SDLE test report Signed-off-by: John Su Change-Id: Ic63e069310aa4a66cd4c9058790dbed37e6967f4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/48288 Reviewed-by: EricR Lai Tested-by: build bot (Jenkins) --- src/mainboard/google/zork/variants/vilboz/overridetree.cb | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src') diff --git a/src/mainboard/google/zork/variants/vilboz/overridetree.cb b/src/mainboard/google/zork/variants/vilboz/overridetree.cb index a19443d0fb..a3c2c978cf 100644 --- a/src/mainboard/google/zork/variants/vilboz/overridetree.cb +++ b/src/mainboard/google/zork/variants/vilboz/overridetree.cb @@ -18,10 +18,10 @@ chip soc/amd/picasso # End : OPN Performance Configuration - register "telemetry_vddcr_vdd_slope_mA" = "32643" - register "telemetry_vddcr_vdd_offset" = "208" - register "telemetry_vddcr_soc_slope_mA" = "22742" - register "telemetry_vddcr_soc_offset" = "-83" + register "telemetry_vddcr_vdd_slope_mA" = "26939" + register "telemetry_vddcr_vdd_offset" = "125" + register "telemetry_vddcr_soc_slope_mA" = "20001" + register "telemetry_vddcr_soc_offset" = "168" # USB OC pin mapping register "usb_port_overcurrent_pin[1]" = "USB_OC_NONE" # LTE instead of USB C1 -- cgit v1.2.3