From e00db59c7c14c5914eab34fbf0c4b929cb50d2eb Mon Sep 17 00:00:00 2001 From: Mark Hsieh Date: Tue, 21 Jul 2020 18:48:42 +0800 Subject: mb/google/arcada: Enable bayhub 720 on Arcada Add PCIe-eMMC bridge bayhub 720 on Arcada to the devicetree. BUG=b:157971972 BRANCH=sarien TEST=local build and boot from SATA/PCIe-eMMC storage successfully Signed-off-by: Mark Hsieh Change-Id: I7e925730e57806e7398684dffd0d3bd1f4f9deeb Reviewed-on: https://review.coreboot.org/c/coreboot/+/43669 Reviewed-by: Tim Wawrzynczak Reviewed-by: Mathew King Tested-by: build bot (Jenkins) --- src/mainboard/google/sarien/variants/arcada/devicetree.cb | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'src') diff --git a/src/mainboard/google/sarien/variants/arcada/devicetree.cb b/src/mainboard/google/sarien/variants/arcada/devicetree.cb index a84e73a826..7e4da3fff8 100644 --- a/src/mainboard/google/sarien/variants/arcada/devicetree.cb +++ b/src/mainboard/google/sarien/variants/arcada/devicetree.cb @@ -382,6 +382,10 @@ chip soc/intel/cannonlake device pci 1d.2 on end # PCI Express Port 11 device pci 1d.3 off end # PCI Express Port 12 device pci 1d.4 on + chip drivers/generic/bayhub + register "power_saving" = "1" + device pci 00.0 on end + end smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "2280" "SlotDataBusWidth4X" end # PCI Express Port 13 (x4) device pci 1e.0 off end # UART #0 -- cgit v1.2.3