From dd217362d44f197b08fa69f3c2c14e743e1bc90b Mon Sep 17 00:00:00 2001 From: Mario Scheithauer Date: Fri, 11 Jan 2019 14:25:38 +0100 Subject: siemens/mc_apl1: Use INTEL_LPSS_UART_FOR_CONSOLE MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit With the commit a96e66a (soc/intel: Clean mess around UART_DEBUG), an adjustment is necessary for this mainboard. Change-Id: I0fb6288959f8bcb45c4cc93cc132f31a5ab2a5ad Signed-off-by: Mario Scheithauer Reviewed-on: https://review.coreboot.org/c/30836 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber Reviewed-by: Kyösti Mälkki --- src/mainboard/siemens/mc_apl1/Kconfig | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'src') diff --git a/src/mainboard/siemens/mc_apl1/Kconfig b/src/mainboard/siemens/mc_apl1/Kconfig index 7ec843ba03..196ca28cdc 100644 --- a/src/mainboard/siemens/mc_apl1/Kconfig +++ b/src/mainboard/siemens/mc_apl1/Kconfig @@ -5,6 +5,7 @@ config BOARD_SIEMENS_BASEBOARD_MC_APL1 select BOARD_ROMSIZE_KB_16384 select HAVE_ACPI_TABLES select USE_SIEMENS_HWILIB + select INTEL_LPSS_UART_FOR_CONSOLE source "src/mainboard/siemens/mc_apl1/variants/*/Kconfig" @@ -34,6 +35,9 @@ config MAINBOARD_PART_NUMBER default "MC APL4" if BOARD_SIEMENS_MC_APL4 default "MC APL5" if BOARD_SIEMENS_MC_APL5 +config UART_FOR_CONSOLE + default 2 + config MAX_CPUS int default 8 -- cgit v1.2.3