From dab81a4e2647a4ccdafcd7f5a4b40736bc3a4269 Mon Sep 17 00:00:00 2001 From: Ryan Salsamendi Date: Fri, 30 Jun 2017 17:36:41 -0700 Subject: northbridge/intel/haswell: Fix copy paste error DIMMB's DDR width is in bit 20, not bit 19. Change-Id: I48866d9243c2a576a02519724429801ae47c5644 Signed-off-by: Ryan Salsamendi Reviewed-on: https://review.coreboot.org/20445 Tested-by: build bot (Jenkins) Reviewed-by: Matt DeVillier Reviewed-by: Nico Huber Reviewed-by: Paul Menzel --- src/northbridge/intel/haswell/raminit.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src') diff --git a/src/northbridge/intel/haswell/raminit.c b/src/northbridge/intel/haswell/raminit.c index aa07f16625..e48cca9f6f 100644 --- a/src/northbridge/intel/haswell/raminit.c +++ b/src/northbridge/intel/haswell/raminit.c @@ -104,7 +104,7 @@ static void report_memory_config(void) ((ch_conf >> 16) & 1) ? "" : ", selected"); printk(BIOS_DEBUG, " DIMMB %d MB width %s %s rank%s\n", ((ch_conf >> 8) & 0xff) * 256, - ((ch_conf >> 19) & 1) ? "x16" : "x8 or x32", + ((ch_conf >> 20) & 1) ? "x16" : "x8 or x32", ((ch_conf >> 18) & 1) ? "dual" : "single", ((ch_conf >> 16) & 1) ? ", selected" : ""); } -- cgit v1.2.3