From da74041b2b3be61737e598a45bd53e773faabfa2 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Sun, 5 Mar 2017 18:57:03 +0200 Subject: AGESA: Move heap allocator declarations MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Definitions are not part of ACPI S3 feature, nor do they require any AGESA headers so move them to a better location. Change-Id: I9269e9d65463463d9b8280936cf90ef76711ed4f Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/18616 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Marc Jones --- src/cpu/amd/agesa/heapmanager.c | 2 +- src/cpu/amd/agesa/s3_resume.c | 1 + src/cpu/amd/agesa/s3_resume.h | 16 ---------------- src/northbridge/amd/agesa/agesa_helper.h | 19 +++++++++++++++++++ src/northbridge/amd/agesa/oem_s3.c | 1 + src/southbridge/amd/agesa/hudson/agesawrapper.c | 2 +- 6 files changed, 23 insertions(+), 18 deletions(-) (limited to 'src') diff --git a/src/cpu/amd/agesa/heapmanager.c b/src/cpu/amd/agesa/heapmanager.c index 087959dc61..9acd0bd6fc 100644 --- a/src/cpu/amd/agesa/heapmanager.c +++ b/src/cpu/amd/agesa/heapmanager.c @@ -17,7 +17,7 @@ #include "heapManager.h" #include -#include +#include #include #include diff --git a/src/cpu/amd/agesa/s3_resume.c b/src/cpu/amd/agesa/s3_resume.c index 1e4aadbed7..f45ff3c3e1 100644 --- a/src/cpu/amd/agesa/s3_resume.c +++ b/src/cpu/amd/agesa/s3_resume.c @@ -25,6 +25,7 @@ #include #include #include "s3_resume.h" +#include static void move_stack_high_mem(void) { diff --git a/src/cpu/amd/agesa/s3_resume.h b/src/cpu/amd/agesa/s3_resume.h index ff2396678b..b10489eeef 100644 --- a/src/cpu/amd/agesa/s3_resume.h +++ b/src/cpu/amd/agesa/s3_resume.h @@ -22,20 +22,4 @@ void prepare_for_resume(void); void backup_mtrr(void *mtrr_store, u32 *mtrr_store_size); const void *OemS3Saved_MTRR_Storage(void); -void *GetHeapBase(void); -void EmptyHeap(void); -void ResumeHeap(void **heap, size_t *len); - -#define BSP_STACK_BASE_ADDR 0x30000 - -#if 1 -/* This covers node 0 only. */ -#define HIGH_ROMSTAGE_STACK_SIZE (0x48000 - BSP_STACK_BASE_ADDR) -#else -/* This covers total of 8 nodes. */ -#define HIGH_ROMSTAGE_STACK_SIZE (0xA0000 - BSP_STACK_BASE_ADDR) -#endif - -#define HIGH_MEMORY_SCRATCH 0x30000 - #endif diff --git a/src/northbridge/amd/agesa/agesa_helper.h b/src/northbridge/amd/agesa/agesa_helper.h index 73f927e576..82963c1f04 100644 --- a/src/northbridge/amd/agesa/agesa_helper.h +++ b/src/northbridge/amd/agesa/agesa_helper.h @@ -16,6 +16,8 @@ #ifndef _AGESA_HELPER_H_ #define _AGESA_HELPER_H_ +#include + enum { PICK_DMI, /* DMI Interface */ PICK_PSTATE, /* Acpi Pstate SSDT Table */ @@ -33,4 +35,21 @@ void amd_initcpuio(void); void amd_initmmio(void); void amd_initenv(void); +void *GetHeapBase(void); +void EmptyHeap(void); +void ResumeHeap(void **heap, size_t *len); + +#define BSP_STACK_BASE_ADDR 0x30000 + +#if 1 +/* This covers node 0 only. */ +#define HIGH_ROMSTAGE_STACK_SIZE (0x48000 - BSP_STACK_BASE_ADDR) +#else +/* This covers total of 8 nodes. */ +#define HIGH_ROMSTAGE_STACK_SIZE (0xA0000 - BSP_STACK_BASE_ADDR) +#endif + +#define HIGH_MEMORY_SCRATCH 0x30000 + + #endif /* _AGESA_HELPER_H_ */ diff --git a/src/northbridge/amd/agesa/oem_s3.c b/src/northbridge/amd/agesa/oem_s3.c index c7d23ff346..a9504acb05 100644 --- a/src/northbridge/amd/agesa/oem_s3.c +++ b/src/northbridge/amd/agesa/oem_s3.c @@ -21,6 +21,7 @@ #include #include #include +#include typedef enum { S3DataTypeNonVolatile = 0, ///< NonVolatile Data Type diff --git a/src/southbridge/amd/agesa/hudson/agesawrapper.c b/src/southbridge/amd/agesa/hudson/agesawrapper.c index 0c0deffcb4..0da792c658 100644 --- a/src/southbridge/amd/agesa/hudson/agesawrapper.c +++ b/src/southbridge/amd/agesa/hudson/agesawrapper.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include "cpuRegisters.h" @@ -30,7 +31,6 @@ #include "heapManager.h" #include "FchPlatform.h" #include "Fch.h" -#include #include #include #include "hudson.h" -- cgit v1.2.3