From da3237376f8f4d35731ef9abfb7a7e5b94926198 Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Tue, 25 May 2010 16:17:45 +0000 Subject: Long ago we agreed on kicking the _direct appendix because everything in coreboot is direct. This patch does it. Signed-off-by: Stefan Reinauer Acked-by: Stefan Reinauer git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5586 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/console/Makefile.inc | 2 +- src/console/usbdebug_console.c | 87 ++++ src/console/usbdebug_direct_console.c | 87 ---- src/cpu/intel/model_106cx/model_106cx_init.c | 2 +- src/cpu/intel/model_6bx/model_6bx_init.c | 2 +- src/cpu/intel/model_6ex/model_6ex_init.c | 2 +- src/cpu/intel/model_6fx/model_6fx_init.c | 2 +- src/include/usbdebug.h | 37 ++ src/include/usbdebug_direct.h | 37 -- src/lib/Makefile.inc | 3 +- src/lib/usbdebug.c | 550 +++++++++++++++++++++ src/lib/usbdebug_direct.c | 550 --------------------- src/mainboard/getac/p470/romstage.c | 2 +- src/mainboard/gigabyte/ga_2761gxdk/romstage.c | 4 +- src/mainboard/gigabyte/m57sli/romstage.c | 4 +- src/mainboard/intel/d945gclf/romstage.c | 2 +- src/mainboard/kontron/986lcd-m/romstage.c | 4 +- src/mainboard/msi/ms7260/romstage.c | 4 +- src/mainboard/msi/ms9652_fam10/romstage.c | 4 +- src/mainboard/nvidia/l1_2pvv/romstage.c | 4 +- src/mainboard/roda/rk886ex/romstage.c | 2 +- src/mainboard/tyan/s2912/romstage.c | 4 +- src/mainboard/tyan/s2912_fam10/romstage.c | 4 +- src/pc80/usbdebug_direct_serial.c | 52 -- src/pc80/usbdebug_serial.c | 52 ++ src/southbridge/amd/sb600/sb600_enable_usbdebug.c | 36 ++ .../amd/sb600/sb600_enable_usbdebug_direct.c | 36 -- src/southbridge/amd/sb600/sb600_usb.c | 2 +- src/southbridge/amd/sb700/sb700_enable_usbdebug.c | 36 ++ .../amd/sb700/sb700_enable_usbdebug_direct.c | 36 -- src/southbridge/amd/sb700/sb700_usb.c | 2 +- src/southbridge/intel/i82801gx/i82801gx_usb_ehci.c | 2 +- .../nvidia/mcp55/mcp55_enable_usbdebug.c | 50 ++ .../nvidia/mcp55/mcp55_enable_usbdebug_direct.c | 50 -- src/southbridge/nvidia/mcp55/mcp55_usb2.c | 2 +- .../sis/sis966/sis966_enable_usbdebug.c | 50 ++ .../sis/sis966/sis966_enable_usbdebug_direct.c | 50 -- src/southbridge/sis/sis966/sis966_usb2.c | 2 +- 38 files changed, 929 insertions(+), 928 deletions(-) create mode 100644 src/console/usbdebug_console.c delete mode 100644 src/console/usbdebug_direct_console.c create mode 100644 src/include/usbdebug.h delete mode 100644 src/include/usbdebug_direct.h create mode 100644 src/lib/usbdebug.c delete mode 100644 src/lib/usbdebug_direct.c delete mode 100644 src/pc80/usbdebug_direct_serial.c create mode 100644 src/pc80/usbdebug_serial.c create mode 100644 src/southbridge/amd/sb600/sb600_enable_usbdebug.c delete mode 100644 src/southbridge/amd/sb600/sb600_enable_usbdebug_direct.c create mode 100644 src/southbridge/amd/sb700/sb700_enable_usbdebug.c delete mode 100644 src/southbridge/amd/sb700/sb700_enable_usbdebug_direct.c create mode 100644 src/southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c delete mode 100644 src/southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c create mode 100644 src/southbridge/sis/sis966/sis966_enable_usbdebug.c delete mode 100644 src/southbridge/sis/sis966/sis966_enable_usbdebug_direct.c (limited to 'src') diff --git a/src/console/Makefile.inc b/src/console/Makefile.inc index cb8c1dfba5..f5fa880b66 100644 --- a/src/console/Makefile.inc +++ b/src/console/Makefile.inc @@ -10,7 +10,7 @@ initobj-y += vtxprintf.o initobj-$(CONFIG_USE_DCACHE_RAM) += console.o driver-$(CONFIG_CONSOLE_SERIAL8250) += uart8250_console.o -driver-$(CONFIG_USBDEBUG_DIRECT) += usbdebug_direct_console.o +driver-$(CONFIG_USBDEBUG_DIRECT) += usbdebug_console.o driver-$(CONFIG_CONSOLE_VGA) += vga_console.o driver-$(CONFIG_CONSOLE_BTEXT) += btext_console.o driver-$(CONFIG_CONSOLE_BTEXT) += font-8x16.o diff --git a/src/console/usbdebug_console.c b/src/console/usbdebug_console.c new file mode 100644 index 0000000000..2e71cc3ea3 --- /dev/null +++ b/src/console/usbdebug_console.c @@ -0,0 +1,87 @@ +/* + * This file is part of the coreboot project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA + */ + +#include +#include +#include +#include + +static struct ehci_debug_info dbg_info; + +void set_ehci_base(unsigned ehci_base) +{ + unsigned diff; + + if (!dbg_info.ehci_debug) + return; + + diff = dbg_info.ehci_caps - ehci_base; + dbg_info.ehci_regs -= diff; + dbg_info.ehci_debug -= diff; + dbg_info.ehci_caps = ehci_base; +} + +void set_ehci_debug(unsigned ehci_debug) +{ + dbg_info.ehci_debug = ehci_debug; +} + +unsigned get_ehci_debug(void) +{ + return dbg_info.ehci_debug; +} + +static void dbgp_init(void) +{ + struct ehci_debug_info *dbg_infox; + + /* At this point, all we have to do is copy the fixed address + * debug_info data structure to our version defined above. */ + + dbg_infox = (struct ehci_debug_info *) + ((CONFIG_RAMTOP) - sizeof(struct ehci_debug_info)); + + memcpy(&dbg_info, dbg_infox, sizeof(struct ehci_debug_info)); +} + +static void dbgp_tx_byte(unsigned char data) +{ + if (dbg_info.ehci_debug) + dbgp_bulk_write_x(&dbg_info, &data, 1); +} + +static unsigned char dbgp_rx_byte(void) +{ + unsigned char data = 0xff; + + if (dbg_info.ehci_debug) + dbgp_bulk_read_x(&dbg_info, &data, 1); + + return data; +} + +static int dbgp_tst_byte(void) +{ + return dbg_info.ehci_debug; +} + +static const struct console_driver usbdebug_direct_console __console = { + .init = dbgp_init, + .tx_byte = dbgp_tx_byte, + .rx_byte = dbgp_rx_byte, + .tst_byte = dbgp_tst_byte, +}; diff --git a/src/console/usbdebug_direct_console.c b/src/console/usbdebug_direct_console.c deleted file mode 100644 index d1006598b0..0000000000 --- a/src/console/usbdebug_direct_console.c +++ /dev/null @@ -1,87 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA - */ - -#include -#include -#include -#include - -static struct ehci_debug_info dbg_info; - -void set_ehci_base(unsigned ehci_base) -{ - unsigned diff; - - if (!dbg_info.ehci_debug) - return; - - diff = dbg_info.ehci_caps - ehci_base; - dbg_info.ehci_regs -= diff; - dbg_info.ehci_debug -= diff; - dbg_info.ehci_caps = ehci_base; -} - -void set_ehci_debug(unsigned ehci_debug) -{ - dbg_info.ehci_debug = ehci_debug; -} - -unsigned get_ehci_debug(void) -{ - return dbg_info.ehci_debug; -} - -static void dbgp_init(void) -{ - struct ehci_debug_info *dbg_infox; - - /* At this point, all we have to do is copy the fixed address - * debug_info data structure to our version defined above. */ - - dbg_infox = (struct ehci_debug_info *) - ((CONFIG_RAMTOP) - sizeof(struct ehci_debug_info)); - - memcpy(&dbg_info, dbg_infox, sizeof(struct ehci_debug_info)); -} - -static void dbgp_tx_byte(unsigned char data) -{ - if (dbg_info.ehci_debug) - dbgp_bulk_write_x(&dbg_info, &data, 1); -} - -static unsigned char dbgp_rx_byte(void) -{ - unsigned char data = 0xff; - - if (dbg_info.ehci_debug) - dbgp_bulk_read_x(&dbg_info, &data, 1); - - return data; -} - -static int dbgp_tst_byte(void) -{ - return dbg_info.ehci_debug; -} - -static const struct console_driver usbdebug_direct_console __console = { - .init = dbgp_init, - .tx_byte = dbgp_tx_byte, - .rx_byte = dbgp_rx_byte, - .tst_byte = dbgp_tst_byte, -}; diff --git a/src/cpu/intel/model_106cx/model_106cx_init.c b/src/cpu/intel/model_106cx/model_106cx_init.c index 65dfebba5b..79164beae7 100644 --- a/src/cpu/intel/model_106cx/model_106cx_init.c +++ b/src/cpu/intel/model_106cx/model_106cx_init.c @@ -29,7 +29,7 @@ #include #include #include -#include +#include static const uint32_t microcode_updates[] = { /* Dummy terminator */ diff --git a/src/cpu/intel/model_6bx/model_6bx_init.c b/src/cpu/intel/model_6bx/model_6bx_init.c index 783138ec83..f8a4a77de2 100644 --- a/src/cpu/intel/model_6bx/model_6bx_init.c +++ b/src/cpu/intel/model_6bx/model_6bx_init.c @@ -30,7 +30,7 @@ #include #include #include -#include +#include static const uint32_t microcode_updates[] = { #include "microcode-737-MU16b11c.h" diff --git a/src/cpu/intel/model_6ex/model_6ex_init.c b/src/cpu/intel/model_6ex/model_6ex_init.c index 4f1d2043b6..91cde9350e 100644 --- a/src/cpu/intel/model_6ex/model_6ex_init.c +++ b/src/cpu/intel/model_6ex/model_6ex_init.c @@ -31,7 +31,7 @@ #include #include #include -#include +#include static const uint32_t microcode_updates[] = { #include "microcode-1624-m206e839.h" diff --git a/src/cpu/intel/model_6fx/model_6fx_init.c b/src/cpu/intel/model_6fx/model_6fx_init.c index 3d1e9ba9a3..3d2ca619ba 100644 --- a/src/cpu/intel/model_6fx/model_6fx_init.c +++ b/src/cpu/intel/model_6fx/model_6fx_init.c @@ -31,7 +31,7 @@ #include #include #include -#include +#include static const uint32_t microcode_updates[] = { #include "microcode-2129-m206f257.h" diff --git a/src/include/usbdebug.h b/src/include/usbdebug.h new file mode 100644 index 0000000000..b9d170b1f3 --- /dev/null +++ b/src/include/usbdebug.h @@ -0,0 +1,37 @@ +/* + * This file is part of the coreboot project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA + */ + +#ifndef USBDEBUG_H +#define USBDEBUG_H + +struct ehci_debug_info { + void *ehci_caps; + void *ehci_regs; + void *ehci_debug; + unsigned devnum; + unsigned endpoint_out; + unsigned endpoint_in; +}; + +int dbgp_bulk_write_x(struct ehci_debug_info *dbg_info, const char *bytes, int size); +int dbgp_bulk_read_x(struct ehci_debug_info *dbg_info, void *data, int size); +void set_ehci_base(unsigned ehci_base); +void set_ehci_debug(unsigned ehci_deug); +unsigned get_ehci_debug(void); +void set_debug_port(unsigned port); + +#endif diff --git a/src/include/usbdebug_direct.h b/src/include/usbdebug_direct.h deleted file mode 100644 index b9d170b1f3..0000000000 --- a/src/include/usbdebug_direct.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA - */ - -#ifndef USBDEBUG_H -#define USBDEBUG_H - -struct ehci_debug_info { - void *ehci_caps; - void *ehci_regs; - void *ehci_debug; - unsigned devnum; - unsigned endpoint_out; - unsigned endpoint_in; -}; - -int dbgp_bulk_write_x(struct ehci_debug_info *dbg_info, const char *bytes, int size); -int dbgp_bulk_read_x(struct ehci_debug_info *dbg_info, void *data, int size); -void set_ehci_base(unsigned ehci_base); -void set_ehci_debug(unsigned ehci_deug); -unsigned get_ehci_debug(void); -void set_debug_port(unsigned port); - -#endif diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index 5b4091251a..6d32de9e37 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -23,7 +23,8 @@ initobj-y += cbfs.o initobj-y += lzma.o #initobj-y += lzmadecode.o -obj-$(CONFIG_USBDEBUG_DIRECT) += usbdebug_direct.o +obj-$(CONFIG_USBDEBUG_DIRECT) += usbdebug.o + obj-$(CONFIG_COMPRESSED_PAYLOAD_LZMA) += lzma.o obj-$(CONFIG_BOOTSPLASH) += jpeg.o diff --git a/src/lib/usbdebug.c b/src/lib/usbdebug.c new file mode 100644 index 0000000000..56ec1e3459 --- /dev/null +++ b/src/lib/usbdebug.c @@ -0,0 +1,550 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2006 Eric Biederman (ebiederm@xmission.com) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA + */ +/* + * 2006.12.10 yhlu moved it to corbeoot and use struct instead + */ +#if !defined(__ROMCC__) +#include +#else +#if CONFIG_USE_PRINTK_IN_CAR==0 +#define printk(BIOS_DEBUG, fmt, arg...) do {} while(0) +#endif +#endif + +#include + +#include +#include +#include + +#define USB_DEBUG_DEVNUM 127 + +#define DBGP_DATA_TOGGLE 0x8800 +#define DBGP_PID_UPDATE(x, tok) \ + ((((x) ^ DBGP_DATA_TOGGLE) & 0xffff00) | ((tok) & 0xff)) + +#define DBGP_LEN_UPDATE(x, len) (((x) & ~0x0f) | ((len) & 0x0f)) +/* + * USB Packet IDs (PIDs) + */ + +/* token */ +#define USB_PID_OUT 0xe1 +#define USB_PID_IN 0x69 +#define USB_PID_SOF 0xa5 +#define USB_PID_SETUP 0x2d +/* handshake */ +#define USB_PID_ACK 0xd2 +#define USB_PID_NAK 0x5a +#define USB_PID_STALL 0x1e +#define USB_PID_NYET 0x96 +/* data */ +#define USB_PID_DATA0 0xc3 +#define USB_PID_DATA1 0x4b +#define USB_PID_DATA2 0x87 +#define USB_PID_MDATA 0x0f +/* Special */ +#define USB_PID_PREAMBLE 0x3c +#define USB_PID_ERR 0x3c +#define USB_PID_SPLIT 0x78 +#define USB_PID_PING 0xb4 +#define USB_PID_UNDEF_0 0xf0 + +#define USB_PID_DATA_TOGGLE 0x88 +#define DBGP_CLAIM (DBGP_OWNER | DBGP_ENABLED | DBGP_INUSE) + +#define PCI_CAP_ID_EHCI_DEBUG 0xa + +#define HUB_ROOT_RESET_TIME 50 /* times are in msec */ +#define HUB_SHORT_RESET_TIME 10 +#define HUB_LONG_RESET_TIME 200 +#define HUB_RESET_TIMEOUT 500 + +#define DBGP_MAX_PACKET 8 + +static int dbgp_wait_until_complete(struct ehci_dbg_port *ehci_debug) +{ + unsigned ctrl; + int loop = 0x100000; + do { + ctrl = read32(&ehci_debug->control); + /* Stop when the transaction is finished */ + if (ctrl & DBGP_DONE) + break; + } while(--loop>0); + + if (!loop) return -1000; + + /* Now that we have observed the completed transaction, + * clear the done bit. + */ + write32(&ehci_debug->control, ctrl | DBGP_DONE); + return (ctrl & DBGP_ERROR) ? -DBGP_ERRCODE(ctrl) : DBGP_LEN(ctrl); +} + +static void dbgp_mdelay(int ms) +{ + int i; + while (ms--) { + for (i = 0; i < 1000; i++) + inb(0x80); + } +} + +static void dbgp_breath(void) +{ + /* Sleep to give the debug port a chance to breathe */ +} + +static int dbgp_wait_until_done(struct ehci_dbg_port *ehci_debug, unsigned ctrl) +{ + unsigned pids, lpid; + int ret; + + int loop = 3; +retry: + write32(&ehci_debug->control, ctrl | DBGP_GO); + ret = dbgp_wait_until_complete(ehci_debug); + pids = read32(&ehci_debug->pids); + lpid = DBGP_PID_GET(pids); + + if (ret < 0) + return ret; + + /* If the port is getting full or it has dropped data + * start pacing ourselves, not necessary but it's friendly. + */ + if ((lpid == USB_PID_NAK) || (lpid == USB_PID_NYET)) + dbgp_breath(); + + /* If I get a NACK reissue the transmission */ + if (lpid == USB_PID_NAK) { + if (--loop > 0) goto retry; + } + + return ret; +} + +static void dbgp_set_data(struct ehci_dbg_port *ehci_debug, const void *buf, int size) +{ + const unsigned char *bytes = buf; + unsigned lo, hi; + int i; + lo = hi = 0; + for (i = 0; i < 4 && i < size; i++) + lo |= bytes[i] << (8*i); + for (; i < 8 && i < size; i++) + hi |= bytes[i] << (8*(i - 4)); + write32(&ehci_debug->data03, lo); + write32(&ehci_debug->data47, hi); +} + +static void dbgp_get_data(struct ehci_dbg_port *ehci_debug, void *buf, int size) +{ + unsigned char *bytes = buf; + unsigned lo, hi; + int i; + lo = read32(&ehci_debug->data03); + hi = read32(&ehci_debug->data47); + for (i = 0; i < 4 && i < size; i++) + bytes[i] = (lo >> (8*i)) & 0xff; + for (; i < 8 && i < size; i++) + bytes[i] = (hi >> (8*(i - 4))) & 0xff; +} + +static int dbgp_bulk_write(struct ehci_dbg_port *ehci_debug, unsigned devnum, unsigned endpoint, const char *bytes, int size) +{ + unsigned pids, addr, ctrl; + int ret; + if (size > DBGP_MAX_PACKET) + return -1; + + addr = DBGP_EPADDR(devnum, endpoint); + + pids = read32(&ehci_debug->pids); + pids = DBGP_PID_UPDATE(pids, USB_PID_OUT); + + ctrl = read32(&ehci_debug->control); + ctrl = DBGP_LEN_UPDATE(ctrl, size); + ctrl |= DBGP_OUT; + ctrl |= DBGP_GO; + + dbgp_set_data(ehci_debug, bytes, size); + write32(&ehci_debug->address, addr); + write32(&ehci_debug->pids, pids); + + ret = dbgp_wait_until_done(ehci_debug, ctrl); + if (ret < 0) { + return ret; + } + return ret; +} + +int dbgp_bulk_write_x(struct ehci_debug_info *dbg_info, const char *bytes, int size) +{ + return dbgp_bulk_write(dbg_info->ehci_debug, dbg_info->devnum, dbg_info->endpoint_out, bytes, size); +} + +static int dbgp_bulk_read(struct ehci_dbg_port *ehci_debug, unsigned devnum, unsigned endpoint, void *data, int size) +{ + unsigned pids, addr, ctrl; + int ret; + + if (size > DBGP_MAX_PACKET) + return -1; + + addr = DBGP_EPADDR(devnum, endpoint); + + pids = read32(&ehci_debug->pids); + pids = DBGP_PID_UPDATE(pids, USB_PID_IN); + + ctrl = read32(&ehci_debug->control); + ctrl = DBGP_LEN_UPDATE(ctrl, size); + ctrl &= ~DBGP_OUT; + ctrl |= DBGP_GO; + + write32(&ehci_debug->address, addr); + write32(&ehci_debug->pids, pids); + ret = dbgp_wait_until_done(ehci_debug, ctrl); + if (ret < 0) + return ret; + if (size > ret) + size = ret; + dbgp_get_data(ehci_debug, data, size); + return ret; +} +int dbgp_bulk_read_x(struct ehci_debug_info *dbg_info, void *data, int size) +{ + return dbgp_bulk_read(dbg_info->ehci_debug, dbg_info->devnum, dbg_info->endpoint_in, data, size); +} + +static int dbgp_control_msg(struct ehci_dbg_port *ehci_debug, unsigned devnum, int requesttype, int request, + int value, int index, void *data, int size) +{ + unsigned pids, addr, ctrl; + struct usb_ctrlrequest req; + int read; + int ret; + + read = (requesttype & USB_DIR_IN) != 0; + if (size > (read?DBGP_MAX_PACKET:0)) + return -1; + + /* Compute the control message */ + req.bRequestType = requesttype; + req.bRequest = request; + req.wValue = value; + req.wIndex = index; + req.wLength = size; + + pids = DBGP_PID_SET(USB_PID_DATA0, USB_PID_SETUP); + addr = DBGP_EPADDR(devnum, 0); + + ctrl = read32(&ehci_debug->control); + ctrl = DBGP_LEN_UPDATE(ctrl, sizeof(req)); + ctrl |= DBGP_OUT; + ctrl |= DBGP_GO; + + /* Send the setup message */ + dbgp_set_data(ehci_debug, &req, sizeof(req)); + write32(&ehci_debug->address, addr); + write32(&ehci_debug->pids, pids); + ret = dbgp_wait_until_done(ehci_debug, ctrl); + if (ret < 0) + return ret; + + + /* Read the result */ + ret = dbgp_bulk_read(ehci_debug, devnum, 0, data, size); + return ret; +} + +static int ehci_reset_port(struct ehci_regs *ehci_regs, int port) +{ + unsigned portsc; + unsigned delay_time, delay; + int loop; + + /* Reset the usb debug port */ + portsc = read32(&ehci_regs->port_status[port - 1]); + portsc &= ~PORT_PE; + portsc |= PORT_RESET; + write32(&ehci_regs->port_status[port - 1], portsc); + + delay = HUB_ROOT_RESET_TIME; + for (delay_time = 0; delay_time < HUB_RESET_TIMEOUT; + delay_time += delay) { + dbgp_mdelay(delay); + + portsc = read32(&ehci_regs->port_status[port - 1]); + if (portsc & PORT_RESET) { + /* force reset to complete */ + loop = 2; + write32(&ehci_regs->port_status[port - 1], + portsc & ~(PORT_RWC_BITS | PORT_RESET)); + do { + dbgp_mdelay(delay); + portsc = read32(&ehci_regs->port_status[port - 1]); + delay_time += delay; + } while ((portsc & PORT_RESET) && (--loop > 0)); + if (!loop) { + printk(BIOS_DEBUG, "ehci_reset_port forced done"); + } + } + + /* Device went away? */ + if (!(portsc & PORT_CONNECT)) + return -107;//-ENOTCONN; + + /* bomb out completely if something weird happend */ + if ((portsc & PORT_CSC)) + return -22;//-EINVAL; + + /* If we've finished resetting, then break out of the loop */ + if (!(portsc & PORT_RESET) && (portsc & PORT_PE)) + return 0; + } + return -16;//-EBUSY; +} + +static int ehci_wait_for_port(struct ehci_regs *ehci_regs, int port) +{ + unsigned status; + int ret, reps; + for (reps = 0; reps < 3; reps++) { + dbgp_mdelay(100); + status = read32(&ehci_regs->status); + if (status & STS_PCD) { + ret = ehci_reset_port(ehci_regs, port); + if (ret == 0) + return 0; + } + } + return -107; //-ENOTCONN; +} + + +#define DBGP_DEBUG 1 +#if DBGP_DEBUG +# define dbgp_printk(fmt_arg...) printk(BIOS_DEBUG, fmt_arg) +#else +#define dbgp_printk(fmt_arg...) do {} while(0) +#endif +static void usbdebug_direct_init(unsigned ehci_bar, unsigned offset, struct ehci_debug_info *info) +{ + struct ehci_caps *ehci_caps; + struct ehci_regs *ehci_regs; + struct ehci_dbg_port *ehci_debug; + unsigned dbgp_endpoint_out; + unsigned dbgp_endpoint_in; + struct usb_debug_descriptor dbgp_desc; + unsigned ctrl, devnum; + int ret; + unsigned delay_time, delay; + int loop; + + unsigned cmd, status, portsc, hcs_params, debug_port, n_ports, new_debug_port; + int i; + unsigned port_map_tried; + + unsigned playtimes = 3; + + ehci_caps = (struct ehci_caps *)ehci_bar; + ehci_regs = (struct ehci_regs *)(ehci_bar + HC_LENGTH(read32(&ehci_caps->hc_capbase))); + ehci_debug = (struct ehci_dbg_port *)(ehci_bar + offset); + + info->ehci_debug = (void *)0; + +try_next_time: + port_map_tried = 0; + +try_next_port: + hcs_params = read32(&ehci_caps->hcs_params); + debug_port = HCS_DEBUG_PORT(hcs_params); + n_ports = HCS_N_PORTS(hcs_params); + + dbgp_printk("ehci_bar: 0x%x\n", ehci_bar); + dbgp_printk("debug_port: %d\n", debug_port); + dbgp_printk("n_ports: %d\n", n_ports); + +#if 1 + for (i = 1; i <= n_ports; i++) { + portsc = read32(&ehci_regs->port_status[i-1]); + dbgp_printk("PORTSC #%d: %08x\n", i, portsc); + } +#endif + + if(port_map_tried && (new_debug_port!=debug_port)) { + if(--playtimes) { + set_debug_port(debug_port); + goto try_next_time; + } + return; + } + + /* Reset the EHCI controller */ + loop = 10; + cmd = read32(&ehci_regs->command); + cmd |= CMD_RESET; + write32(&ehci_regs->command, cmd); + do { + cmd = read32(&ehci_regs->command); + } while ((cmd & CMD_RESET) && (--loop > 0)); + + if(!loop) + dbgp_printk("Could not reset EHCI controller.\n"); + else + dbgp_printk("EHCI controller reset successfully.\n"); + + /* Claim ownership, but do not enable yet */ + ctrl = read32(&ehci_debug->control); + ctrl |= DBGP_OWNER; + ctrl &= ~(DBGP_ENABLED | DBGP_INUSE); + write32(&ehci_debug->control, ctrl); + + /* Start the ehci running */ + cmd = read32(&ehci_regs->command); + cmd &= ~(CMD_LRESET | CMD_IAAD | CMD_PSE | CMD_ASE | CMD_RESET); + cmd |= CMD_RUN; + write32(&ehci_regs->command, cmd); + + /* Ensure everything is routed to the EHCI */ + write32(&ehci_regs->configured_flag, FLAG_CF); + + /* Wait until the controller is no longer halted */ + loop = 10; + do { + status = read32(&ehci_regs->status); + } while ((status & STS_HALT) && (--loop>0)); + + if(!loop) { + dbgp_printk("EHCI could not be started.\n"); + return; + } + dbgp_printk("EHCI started.\n"); + + /* Wait for a device to show up in the debug port */ + ret = ehci_wait_for_port(ehci_regs, debug_port); + if (ret < 0) { + dbgp_printk("No device found in debug port %d\n", debug_port); + goto next_debug_port; + } + dbgp_printk("EHCI done waiting for port.\n"); + + /* Enable the debug port */ + ctrl = read32(&ehci_debug->control); + ctrl |= DBGP_CLAIM; + write32(&ehci_debug->control, ctrl); + ctrl = read32(&ehci_debug->control); + if ((ctrl & DBGP_CLAIM) != DBGP_CLAIM) { + dbgp_printk("No device in EHCI debug port.\n"); + write32(&ehci_debug->control, ctrl & ~DBGP_CLAIM); + goto err; + } + dbgp_printk("EHCI debug port enabled.\n"); + + /* Completely transfer the debug device to the debug controller */ + portsc = read32(&ehci_regs->port_status[debug_port - 1]); + portsc &= ~PORT_PE; + write32(&ehci_regs->port_status[debug_port - 1], portsc); + + dbgp_mdelay(100); + + /* Find the debug device and make it device number 127 */ + for (devnum = 0; devnum <= 127; devnum++) { + ret = dbgp_control_msg(ehci_debug, devnum, + USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_DEVICE, + USB_REQ_GET_DESCRIPTOR, (USB_DT_DEBUG << 8), 0, + &dbgp_desc, sizeof(dbgp_desc)); + if (ret > 0) + break; + } + if (devnum > 127) { + dbgp_printk("Could not find attached debug device.\n"); + goto err; + } + if (ret < 0) { + dbgp_printk("Attached device is not a debug device.\n"); + goto err; + } + dbgp_endpoint_out = dbgp_desc.bDebugOutEndpoint; + dbgp_endpoint_in = dbgp_desc.bDebugInEndpoint; + + /* Move the device to 127 if it isn't already there */ + if (devnum != USB_DEBUG_DEVNUM) { + ret = dbgp_control_msg(ehci_debug, devnum, + USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE, + USB_REQ_SET_ADDRESS, USB_DEBUG_DEVNUM, 0, (void *)0, 0); + if (ret < 0) { + dbgp_printk("Could not move attached device to %d.\n", + USB_DEBUG_DEVNUM); + goto err; + } + devnum = USB_DEBUG_DEVNUM; + dbgp_printk("EHCI debug device renamed to 127.\n"); + } + + /* Enable the debug interface */ + ret = dbgp_control_msg(ehci_debug, USB_DEBUG_DEVNUM, + USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE, + USB_REQ_SET_FEATURE, USB_DEVICE_DEBUG_MODE, 0, (void *)0, 0); + if (ret < 0) { + dbgp_printk("Could not enable EHCI debug device.\n"); + goto err; + } + dbgp_printk("EHCI debug interface enabled.\n"); + + /* Perform a small write to get the even/odd data state in sync + */ + ret = dbgp_bulk_write(ehci_debug, USB_DEBUG_DEVNUM, dbgp_endpoint_out, " ",1); + if (ret < 0) { + dbgp_printk("dbgp_bulk_write failed: %d\n", ret); + goto err; + } + dbgp_printk("Test write done\n"); + + info->ehci_caps = ehci_caps; + info->ehci_regs = ehci_regs; + info->ehci_debug = ehci_debug; + info->devnum = devnum; + info->endpoint_out = dbgp_endpoint_out; + info->endpoint_in = dbgp_endpoint_in; + + return; +err: + /* Things didn't work so remove my claim */ + ctrl = read32(&ehci_debug->control); + ctrl &= ~(DBGP_CLAIM | DBGP_OUT); + write32((unsigned long)&ehci_debug->control, ctrl); + +next_debug_port: + port_map_tried |= (1<<(debug_port-1)); + if(port_map_tried != ((1< -#else -#if CONFIG_USE_PRINTK_IN_CAR==0 -#define printk(BIOS_DEBUG, fmt, arg...) do {} while(0) -#endif -#endif - -#include - -#include -#include -#include - -#define USB_DEBUG_DEVNUM 127 - -#define DBGP_DATA_TOGGLE 0x8800 -#define DBGP_PID_UPDATE(x, tok) \ - ((((x) ^ DBGP_DATA_TOGGLE) & 0xffff00) | ((tok) & 0xff)) - -#define DBGP_LEN_UPDATE(x, len) (((x) & ~0x0f) | ((len) & 0x0f)) -/* - * USB Packet IDs (PIDs) - */ - -/* token */ -#define USB_PID_OUT 0xe1 -#define USB_PID_IN 0x69 -#define USB_PID_SOF 0xa5 -#define USB_PID_SETUP 0x2d -/* handshake */ -#define USB_PID_ACK 0xd2 -#define USB_PID_NAK 0x5a -#define USB_PID_STALL 0x1e -#define USB_PID_NYET 0x96 -/* data */ -#define USB_PID_DATA0 0xc3 -#define USB_PID_DATA1 0x4b -#define USB_PID_DATA2 0x87 -#define USB_PID_MDATA 0x0f -/* Special */ -#define USB_PID_PREAMBLE 0x3c -#define USB_PID_ERR 0x3c -#define USB_PID_SPLIT 0x78 -#define USB_PID_PING 0xb4 -#define USB_PID_UNDEF_0 0xf0 - -#define USB_PID_DATA_TOGGLE 0x88 -#define DBGP_CLAIM (DBGP_OWNER | DBGP_ENABLED | DBGP_INUSE) - -#define PCI_CAP_ID_EHCI_DEBUG 0xa - -#define HUB_ROOT_RESET_TIME 50 /* times are in msec */ -#define HUB_SHORT_RESET_TIME 10 -#define HUB_LONG_RESET_TIME 200 -#define HUB_RESET_TIMEOUT 500 - -#define DBGP_MAX_PACKET 8 - -static int dbgp_wait_until_complete(struct ehci_dbg_port *ehci_debug) -{ - unsigned ctrl; - int loop = 0x100000; - do { - ctrl = read32(&ehci_debug->control); - /* Stop when the transaction is finished */ - if (ctrl & DBGP_DONE) - break; - } while(--loop>0); - - if (!loop) return -1000; - - /* Now that we have observed the completed transaction, - * clear the done bit. - */ - write32(&ehci_debug->control, ctrl | DBGP_DONE); - return (ctrl & DBGP_ERROR) ? -DBGP_ERRCODE(ctrl) : DBGP_LEN(ctrl); -} - -static void dbgp_mdelay(int ms) -{ - int i; - while (ms--) { - for (i = 0; i < 1000; i++) - inb(0x80); - } -} - -static void dbgp_breath(void) -{ - /* Sleep to give the debug port a chance to breathe */ -} - -static int dbgp_wait_until_done(struct ehci_dbg_port *ehci_debug, unsigned ctrl) -{ - unsigned pids, lpid; - int ret; - - int loop = 3; -retry: - write32(&ehci_debug->control, ctrl | DBGP_GO); - ret = dbgp_wait_until_complete(ehci_debug); - pids = read32(&ehci_debug->pids); - lpid = DBGP_PID_GET(pids); - - if (ret < 0) - return ret; - - /* If the port is getting full or it has dropped data - * start pacing ourselves, not necessary but it's friendly. - */ - if ((lpid == USB_PID_NAK) || (lpid == USB_PID_NYET)) - dbgp_breath(); - - /* If I get a NACK reissue the transmission */ - if (lpid == USB_PID_NAK) { - if (--loop > 0) goto retry; - } - - return ret; -} - -static void dbgp_set_data(struct ehci_dbg_port *ehci_debug, const void *buf, int size) -{ - const unsigned char *bytes = buf; - unsigned lo, hi; - int i; - lo = hi = 0; - for (i = 0; i < 4 && i < size; i++) - lo |= bytes[i] << (8*i); - for (; i < 8 && i < size; i++) - hi |= bytes[i] << (8*(i - 4)); - write32(&ehci_debug->data03, lo); - write32(&ehci_debug->data47, hi); -} - -static void dbgp_get_data(struct ehci_dbg_port *ehci_debug, void *buf, int size) -{ - unsigned char *bytes = buf; - unsigned lo, hi; - int i; - lo = read32(&ehci_debug->data03); - hi = read32(&ehci_debug->data47); - for (i = 0; i < 4 && i < size; i++) - bytes[i] = (lo >> (8*i)) & 0xff; - for (; i < 8 && i < size; i++) - bytes[i] = (hi >> (8*(i - 4))) & 0xff; -} - -static int dbgp_bulk_write(struct ehci_dbg_port *ehci_debug, unsigned devnum, unsigned endpoint, const char *bytes, int size) -{ - unsigned pids, addr, ctrl; - int ret; - if (size > DBGP_MAX_PACKET) - return -1; - - addr = DBGP_EPADDR(devnum, endpoint); - - pids = read32(&ehci_debug->pids); - pids = DBGP_PID_UPDATE(pids, USB_PID_OUT); - - ctrl = read32(&ehci_debug->control); - ctrl = DBGP_LEN_UPDATE(ctrl, size); - ctrl |= DBGP_OUT; - ctrl |= DBGP_GO; - - dbgp_set_data(ehci_debug, bytes, size); - write32(&ehci_debug->address, addr); - write32(&ehci_debug->pids, pids); - - ret = dbgp_wait_until_done(ehci_debug, ctrl); - if (ret < 0) { - return ret; - } - return ret; -} - -int dbgp_bulk_write_x(struct ehci_debug_info *dbg_info, const char *bytes, int size) -{ - return dbgp_bulk_write(dbg_info->ehci_debug, dbg_info->devnum, dbg_info->endpoint_out, bytes, size); -} - -static int dbgp_bulk_read(struct ehci_dbg_port *ehci_debug, unsigned devnum, unsigned endpoint, void *data, int size) -{ - unsigned pids, addr, ctrl; - int ret; - - if (size > DBGP_MAX_PACKET) - return -1; - - addr = DBGP_EPADDR(devnum, endpoint); - - pids = read32(&ehci_debug->pids); - pids = DBGP_PID_UPDATE(pids, USB_PID_IN); - - ctrl = read32(&ehci_debug->control); - ctrl = DBGP_LEN_UPDATE(ctrl, size); - ctrl &= ~DBGP_OUT; - ctrl |= DBGP_GO; - - write32(&ehci_debug->address, addr); - write32(&ehci_debug->pids, pids); - ret = dbgp_wait_until_done(ehci_debug, ctrl); - if (ret < 0) - return ret; - if (size > ret) - size = ret; - dbgp_get_data(ehci_debug, data, size); - return ret; -} -int dbgp_bulk_read_x(struct ehci_debug_info *dbg_info, void *data, int size) -{ - return dbgp_bulk_read(dbg_info->ehci_debug, dbg_info->devnum, dbg_info->endpoint_in, data, size); -} - -static int dbgp_control_msg(struct ehci_dbg_port *ehci_debug, unsigned devnum, int requesttype, int request, - int value, int index, void *data, int size) -{ - unsigned pids, addr, ctrl; - struct usb_ctrlrequest req; - int read; - int ret; - - read = (requesttype & USB_DIR_IN) != 0; - if (size > (read?DBGP_MAX_PACKET:0)) - return -1; - - /* Compute the control message */ - req.bRequestType = requesttype; - req.bRequest = request; - req.wValue = value; - req.wIndex = index; - req.wLength = size; - - pids = DBGP_PID_SET(USB_PID_DATA0, USB_PID_SETUP); - addr = DBGP_EPADDR(devnum, 0); - - ctrl = read32(&ehci_debug->control); - ctrl = DBGP_LEN_UPDATE(ctrl, sizeof(req)); - ctrl |= DBGP_OUT; - ctrl |= DBGP_GO; - - /* Send the setup message */ - dbgp_set_data(ehci_debug, &req, sizeof(req)); - write32(&ehci_debug->address, addr); - write32(&ehci_debug->pids, pids); - ret = dbgp_wait_until_done(ehci_debug, ctrl); - if (ret < 0) - return ret; - - - /* Read the result */ - ret = dbgp_bulk_read(ehci_debug, devnum, 0, data, size); - return ret; -} - -static int ehci_reset_port(struct ehci_regs *ehci_regs, int port) -{ - unsigned portsc; - unsigned delay_time, delay; - int loop; - - /* Reset the usb debug port */ - portsc = read32(&ehci_regs->port_status[port - 1]); - portsc &= ~PORT_PE; - portsc |= PORT_RESET; - write32(&ehci_regs->port_status[port - 1], portsc); - - delay = HUB_ROOT_RESET_TIME; - for (delay_time = 0; delay_time < HUB_RESET_TIMEOUT; - delay_time += delay) { - dbgp_mdelay(delay); - - portsc = read32(&ehci_regs->port_status[port - 1]); - if (portsc & PORT_RESET) { - /* force reset to complete */ - loop = 2; - write32(&ehci_regs->port_status[port - 1], - portsc & ~(PORT_RWC_BITS | PORT_RESET)); - do { - dbgp_mdelay(delay); - portsc = read32(&ehci_regs->port_status[port - 1]); - delay_time += delay; - } while ((portsc & PORT_RESET) && (--loop > 0)); - if (!loop) { - printk(BIOS_DEBUG, "ehci_reset_port forced done"); - } - } - - /* Device went away? */ - if (!(portsc & PORT_CONNECT)) - return -107;//-ENOTCONN; - - /* bomb out completely if something weird happend */ - if ((portsc & PORT_CSC)) - return -22;//-EINVAL; - - /* If we've finished resetting, then break out of the loop */ - if (!(portsc & PORT_RESET) && (portsc & PORT_PE)) - return 0; - } - return -16;//-EBUSY; -} - -static int ehci_wait_for_port(struct ehci_regs *ehci_regs, int port) -{ - unsigned status; - int ret, reps; - for (reps = 0; reps < 3; reps++) { - dbgp_mdelay(100); - status = read32(&ehci_regs->status); - if (status & STS_PCD) { - ret = ehci_reset_port(ehci_regs, port); - if (ret == 0) - return 0; - } - } - return -107; //-ENOTCONN; -} - - -#define DBGP_DEBUG 1 -#if DBGP_DEBUG -# define dbgp_printk(fmt_arg...) printk(BIOS_DEBUG, fmt_arg) -#else -#define dbgp_printk(fmt_arg...) do {} while(0) -#endif -static void usbdebug_direct_init(unsigned ehci_bar, unsigned offset, struct ehci_debug_info *info) -{ - struct ehci_caps *ehci_caps; - struct ehci_regs *ehci_regs; - struct ehci_dbg_port *ehci_debug; - unsigned dbgp_endpoint_out; - unsigned dbgp_endpoint_in; - struct usb_debug_descriptor dbgp_desc; - unsigned ctrl, devnum; - int ret; - unsigned delay_time, delay; - int loop; - - unsigned cmd, status, portsc, hcs_params, debug_port, n_ports, new_debug_port; - int i; - unsigned port_map_tried; - - unsigned playtimes = 3; - - ehci_caps = (struct ehci_caps *)ehci_bar; - ehci_regs = (struct ehci_regs *)(ehci_bar + HC_LENGTH(read32(&ehci_caps->hc_capbase))); - ehci_debug = (struct ehci_dbg_port *)(ehci_bar + offset); - - info->ehci_debug = (void *)0; - -try_next_time: - port_map_tried = 0; - -try_next_port: - hcs_params = read32(&ehci_caps->hcs_params); - debug_port = HCS_DEBUG_PORT(hcs_params); - n_ports = HCS_N_PORTS(hcs_params); - - dbgp_printk("ehci_bar: 0x%x\n", ehci_bar); - dbgp_printk("debug_port: %d\n", debug_port); - dbgp_printk("n_ports: %d\n", n_ports); - -#if 1 - for (i = 1; i <= n_ports; i++) { - portsc = read32(&ehci_regs->port_status[i-1]); - dbgp_printk("PORTSC #%d: %08x\n", i, portsc); - } -#endif - - if(port_map_tried && (new_debug_port!=debug_port)) { - if(--playtimes) { - set_debug_port(debug_port); - goto try_next_time; - } - return; - } - - /* Reset the EHCI controller */ - loop = 10; - cmd = read32(&ehci_regs->command); - cmd |= CMD_RESET; - write32(&ehci_regs->command, cmd); - do { - cmd = read32(&ehci_regs->command); - } while ((cmd & CMD_RESET) && (--loop > 0)); - - if(!loop) - dbgp_printk("Could not reset EHCI controller.\n"); - else - dbgp_printk("EHCI controller reset successfully.\n"); - - /* Claim ownership, but do not enable yet */ - ctrl = read32(&ehci_debug->control); - ctrl |= DBGP_OWNER; - ctrl &= ~(DBGP_ENABLED | DBGP_INUSE); - write32(&ehci_debug->control, ctrl); - - /* Start the ehci running */ - cmd = read32(&ehci_regs->command); - cmd &= ~(CMD_LRESET | CMD_IAAD | CMD_PSE | CMD_ASE | CMD_RESET); - cmd |= CMD_RUN; - write32(&ehci_regs->command, cmd); - - /* Ensure everything is routed to the EHCI */ - write32(&ehci_regs->configured_flag, FLAG_CF); - - /* Wait until the controller is no longer halted */ - loop = 10; - do { - status = read32(&ehci_regs->status); - } while ((status & STS_HALT) && (--loop>0)); - - if(!loop) { - dbgp_printk("EHCI could not be started.\n"); - return; - } - dbgp_printk("EHCI started.\n"); - - /* Wait for a device to show up in the debug port */ - ret = ehci_wait_for_port(ehci_regs, debug_port); - if (ret < 0) { - dbgp_printk("No device found in debug port %d\n", debug_port); - goto next_debug_port; - } - dbgp_printk("EHCI done waiting for port.\n"); - - /* Enable the debug port */ - ctrl = read32(&ehci_debug->control); - ctrl |= DBGP_CLAIM; - write32(&ehci_debug->control, ctrl); - ctrl = read32(&ehci_debug->control); - if ((ctrl & DBGP_CLAIM) != DBGP_CLAIM) { - dbgp_printk("No device in EHCI debug port.\n"); - write32(&ehci_debug->control, ctrl & ~DBGP_CLAIM); - goto err; - } - dbgp_printk("EHCI debug port enabled.\n"); - - /* Completely transfer the debug device to the debug controller */ - portsc = read32(&ehci_regs->port_status[debug_port - 1]); - portsc &= ~PORT_PE; - write32(&ehci_regs->port_status[debug_port - 1], portsc); - - dbgp_mdelay(100); - - /* Find the debug device and make it device number 127 */ - for (devnum = 0; devnum <= 127; devnum++) { - ret = dbgp_control_msg(ehci_debug, devnum, - USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_DEVICE, - USB_REQ_GET_DESCRIPTOR, (USB_DT_DEBUG << 8), 0, - &dbgp_desc, sizeof(dbgp_desc)); - if (ret > 0) - break; - } - if (devnum > 127) { - dbgp_printk("Could not find attached debug device.\n"); - goto err; - } - if (ret < 0) { - dbgp_printk("Attached device is not a debug device.\n"); - goto err; - } - dbgp_endpoint_out = dbgp_desc.bDebugOutEndpoint; - dbgp_endpoint_in = dbgp_desc.bDebugInEndpoint; - - /* Move the device to 127 if it isn't already there */ - if (devnum != USB_DEBUG_DEVNUM) { - ret = dbgp_control_msg(ehci_debug, devnum, - USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE, - USB_REQ_SET_ADDRESS, USB_DEBUG_DEVNUM, 0, (void *)0, 0); - if (ret < 0) { - dbgp_printk("Could not move attached device to %d.\n", - USB_DEBUG_DEVNUM); - goto err; - } - devnum = USB_DEBUG_DEVNUM; - dbgp_printk("EHCI debug device renamed to 127.\n"); - } - - /* Enable the debug interface */ - ret = dbgp_control_msg(ehci_debug, USB_DEBUG_DEVNUM, - USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE, - USB_REQ_SET_FEATURE, USB_DEVICE_DEBUG_MODE, 0, (void *)0, 0); - if (ret < 0) { - dbgp_printk("Could not enable EHCI debug device.\n"); - goto err; - } - dbgp_printk("EHCI debug interface enabled.\n"); - - /* Perform a small write to get the even/odd data state in sync - */ - ret = dbgp_bulk_write(ehci_debug, USB_DEBUG_DEVNUM, dbgp_endpoint_out, " ",1); - if (ret < 0) { - dbgp_printk("dbgp_bulk_write failed: %d\n", ret); - goto err; - } - dbgp_printk("Test write done\n"); - - info->ehci_caps = ehci_caps; - info->ehci_regs = ehci_regs; - info->ehci_debug = ehci_debug; - info->devnum = devnum; - info->endpoint_out = dbgp_endpoint_out; - info->endpoint_in = dbgp_endpoint_in; - - return; -err: - /* Things didn't work so remove my claim */ - ctrl = read32(&ehci_debug->control); - ctrl &= ~(DBGP_CLAIM | DBGP_OUT); - write32((unsigned long)&ehci_debug->control, ctrl); - -next_debug_port: - port_map_tried |= (1<<(debug_port-1)); - if(port_map_tried != ((1< #if CONFIG_USBDEBUG_DIRECT -#include "southbridge/sis/sis966/sis966_enable_usbdebug_direct.c" -#include "pc80/usbdebug_direct_serial.c" +#include "southbridge/sis/sis966/sis966_enable_usbdebug.c" +#include "pc80/usbdebug_serial.c" #endif #include "lib/ramtest.c" diff --git a/src/mainboard/gigabyte/m57sli/romstage.c b/src/mainboard/gigabyte/m57sli/romstage.c index ad6ee79ab7..683f92b5f6 100644 --- a/src/mainboard/gigabyte/m57sli/romstage.c +++ b/src/mainboard/gigabyte/m57sli/romstage.c @@ -53,8 +53,8 @@ #include #if CONFIG_USBDEBUG_DIRECT -#include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c" -#include "pc80/usbdebug_direct_serial.c" +#include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c" +#include "pc80/usbdebug_serial.c" #endif #include "lib/ramtest.c" diff --git a/src/mainboard/intel/d945gclf/romstage.c b/src/mainboard/intel/d945gclf/romstage.c index c50a66f776..961069a59a 100644 --- a/src/mainboard/intel/d945gclf/romstage.c +++ b/src/mainboard/intel/d945gclf/romstage.c @@ -42,7 +42,7 @@ #if CONFIG_USBDEBUG_DIRECT #define DBGP_DEFAULT 1 #include "southbridge/intel/i82801gx/i82801gx_usb_debug.c" -#include "pc80/usbdebug_direct_serial.c" +#include "pc80/usbdebug_serial.c" #endif #include "lib/ramtest.c" diff --git a/src/mainboard/kontron/986lcd-m/romstage.c b/src/mainboard/kontron/986lcd-m/romstage.c index cb40034751..94a5065fa1 100644 --- a/src/mainboard/kontron/986lcd-m/romstage.c +++ b/src/mainboard/kontron/986lcd-m/romstage.c @@ -50,9 +50,9 @@ #if CONFIG_USBDEBUG_DIRECT #define DBGP_DEFAULT 1 -#include +#include #include "southbridge/intel/i82801gx/i82801gx_usb_debug.c" -#include "pc80/usbdebug_direct_serial.c" +#include "pc80/usbdebug_serial.c" #endif #include "lib/ramtest.c" diff --git a/src/mainboard/msi/ms7260/romstage.c b/src/mainboard/msi/ms7260/romstage.c index 167fa34e26..55adf23dba 100644 --- a/src/mainboard/msi/ms7260/romstage.c +++ b/src/mainboard/msi/ms7260/romstage.c @@ -57,8 +57,8 @@ #include #if CONFIG_USBDEBUG_DIRECT -#include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c" -#include "pc80/usbdebug_direct_serial.c" +#include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c" +#include "pc80/usbdebug_serial.c" #endif #include "lib/ramtest.c" #include diff --git a/src/mainboard/msi/ms9652_fam10/romstage.c b/src/mainboard/msi/ms9652_fam10/romstage.c index 1e44c86c5b..e0566b6114 100644 --- a/src/mainboard/msi/ms9652_fam10/romstage.c +++ b/src/mainboard/msi/ms9652_fam10/romstage.c @@ -46,8 +46,8 @@ #include "option_table.h" #include #if CONFIG_USBDEBUG_DIRECT -#include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c" -#include "pc80/usbdebug_direct_serial.c" +#include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c" +#include "pc80/usbdebug_serial.c" #endif #include "lib/ramtest.c" diff --git a/src/mainboard/nvidia/l1_2pvv/romstage.c b/src/mainboard/nvidia/l1_2pvv/romstage.c index db93735052..d5b717f8b3 100644 --- a/src/mainboard/nvidia/l1_2pvv/romstage.c +++ b/src/mainboard/nvidia/l1_2pvv/romstage.c @@ -53,8 +53,8 @@ #include #if CONFIG_USBDEBUG_DIRECT -#include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c" -#include "pc80/usbdebug_direct_serial.c" +#include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c" +#include "pc80/usbdebug_serial.c" #endif #include "lib/ramtest.c" diff --git a/src/mainboard/roda/rk886ex/romstage.c b/src/mainboard/roda/rk886ex/romstage.c index 803aaee89b..a910d1aadd 100644 --- a/src/mainboard/roda/rk886ex/romstage.c +++ b/src/mainboard/roda/rk886ex/romstage.c @@ -44,7 +44,7 @@ #if CONFIG_USBDEBUG_DIRECT #define DBGP_DEFAULT 1 #include "southbridge/intel/i82801gx/i82801gx_usb_debug.c" -#include "pc80/usbdebug_direct_serial.c" +#include "pc80/usbdebug_serial.c" #endif #include "lib/ramtest.c" diff --git a/src/mainboard/tyan/s2912/romstage.c b/src/mainboard/tyan/s2912/romstage.c index 180b1eb26f..4f536e77d7 100644 --- a/src/mainboard/tyan/s2912/romstage.c +++ b/src/mainboard/tyan/s2912/romstage.c @@ -53,8 +53,8 @@ #include #if CONFIG_USBDEBUG_DIRECT -#include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c" -#include "pc80/usbdebug_direct_serial.c" +#include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c" +#include "pc80/usbdebug_serial.c" #endif #include "lib/ramtest.c" diff --git a/src/mainboard/tyan/s2912_fam10/romstage.c b/src/mainboard/tyan/s2912_fam10/romstage.c index 5d54713ece..5290470929 100644 --- a/src/mainboard/tyan/s2912_fam10/romstage.c +++ b/src/mainboard/tyan/s2912_fam10/romstage.c @@ -46,8 +46,8 @@ #include "option_table.h" #include #if CONFIG_USBDEBUG_DIRECT -#include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c" -#include "pc80/usbdebug_direct_serial.c" +#include "southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c" +#include "pc80/usbdebug_serial.c" #endif #include "lib/ramtest.c" diff --git a/src/pc80/usbdebug_direct_serial.c b/src/pc80/usbdebug_direct_serial.c deleted file mode 100644 index 15eac02306..0000000000 --- a/src/pc80/usbdebug_direct_serial.c +++ /dev/null @@ -1,52 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA - */ - -#include "../lib/usbdebug_direct.c" - -static void early_usbdebug_direct_init(void) -{ - struct ehci_debug_info *dbg_info = (struct ehci_debug_info *) - (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - sizeof(struct ehci_debug_info)); - - usbdebug_direct_init(EHCI_BAR, EHCI_DEBUG_OFFSET, dbg_info); -} - -void usbdebug_direct_tx_byte(unsigned char data) -{ - struct ehci_debug_info *dbg_info; - - /* "Find" dbg_info structure in Cache */ - dbg_info = (struct ehci_debug_info *) - (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - sizeof(struct ehci_debug_info)); - - if (dbg_info->ehci_debug) { - dbgp_bulk_write_x(dbg_info, &data, 1); - } -} - -void usbdebug_direct_ram_tx_byte(unsigned char data) -{ - struct ehci_debug_info *dbg_info; - - /* "Find" dbg_info structure in RAM */ - dbg_info = (struct ehci_debug_info *) - ((CONFIG_RAMTOP) - sizeof(struct ehci_debug_info)); - - if (dbg_info->ehci_debug) { - dbgp_bulk_write_x(dbg_info, &data, 1); - } -} diff --git a/src/pc80/usbdebug_serial.c b/src/pc80/usbdebug_serial.c new file mode 100644 index 0000000000..474882b6d1 --- /dev/null +++ b/src/pc80/usbdebug_serial.c @@ -0,0 +1,52 @@ +/* + * This file is part of the coreboot project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA + */ + +#include "../lib/usbdebug.c" + +static void early_usbdebug_direct_init(void) +{ + struct ehci_debug_info *dbg_info = (struct ehci_debug_info *) + (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - sizeof(struct ehci_debug_info)); + + usbdebug_direct_init(EHCI_BAR, EHCI_DEBUG_OFFSET, dbg_info); +} + +void usbdebug_direct_tx_byte(unsigned char data) +{ + struct ehci_debug_info *dbg_info; + + /* "Find" dbg_info structure in Cache */ + dbg_info = (struct ehci_debug_info *) + (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - sizeof(struct ehci_debug_info)); + + if (dbg_info->ehci_debug) { + dbgp_bulk_write_x(dbg_info, &data, 1); + } +} + +void usbdebug_direct_ram_tx_byte(unsigned char data) +{ + struct ehci_debug_info *dbg_info; + + /* "Find" dbg_info structure in RAM */ + dbg_info = (struct ehci_debug_info *) + ((CONFIG_RAMTOP) - sizeof(struct ehci_debug_info)); + + if (dbg_info->ehci_debug) { + dbgp_bulk_write_x(dbg_info, &data, 1); + } +} diff --git a/src/southbridge/amd/sb600/sb600_enable_usbdebug.c b/src/southbridge/amd/sb600/sb600_enable_usbdebug.c new file mode 100644 index 0000000000..5fded2fa3f --- /dev/null +++ b/src/southbridge/amd/sb600/sb600_enable_usbdebug.c @@ -0,0 +1,36 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2008 Advanced Micro Devices, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef SB600_DEVN_BASE + +#define SB600_DEVN_BASE 0 + +#endif + +#define EHCI_BAR_INDEX 0x10 +#define EHCI_BAR 0xFEF00000 +#define EHCI_DEBUG_OFFSET 0xE0 + +static void sb600_enable_usbdebug_direct(u32 port) +{ + set_debug_port(port); + pci_write_config32(PCI_DEV(0, SB600_DEVN_BASE + 0x13, 5), + EHCI_BAR_INDEX, EHCI_BAR); + pci_write_config8(PCI_DEV(0, SB600_DEVN_BASE + 0x13, 5), 0x04, 0x2); /* mem space enabe */ +} diff --git a/src/southbridge/amd/sb600/sb600_enable_usbdebug_direct.c b/src/southbridge/amd/sb600/sb600_enable_usbdebug_direct.c deleted file mode 100644 index 5fded2fa3f..0000000000 --- a/src/southbridge/amd/sb600/sb600_enable_usbdebug_direct.c +++ /dev/null @@ -1,36 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2008 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#ifndef SB600_DEVN_BASE - -#define SB600_DEVN_BASE 0 - -#endif - -#define EHCI_BAR_INDEX 0x10 -#define EHCI_BAR 0xFEF00000 -#define EHCI_DEBUG_OFFSET 0xE0 - -static void sb600_enable_usbdebug_direct(u32 port) -{ - set_debug_port(port); - pci_write_config32(PCI_DEV(0, SB600_DEVN_BASE + 0x13, 5), - EHCI_BAR_INDEX, EHCI_BAR); - pci_write_config8(PCI_DEV(0, SB600_DEVN_BASE + 0x13, 5), 0x04, 0x2); /* mem space enabe */ -} diff --git a/src/southbridge/amd/sb600/sb600_usb.c b/src/southbridge/amd/sb600/sb600_usb.c index b6e1fbec6b..3b5e5f562b 100644 --- a/src/southbridge/amd/sb600/sb600_usb.c +++ b/src/southbridge/amd/sb600/sb600_usb.c @@ -22,7 +22,7 @@ #include #include #include -#include +#include #include #include "sb600.h" diff --git a/src/southbridge/amd/sb700/sb700_enable_usbdebug.c b/src/southbridge/amd/sb700/sb700_enable_usbdebug.c new file mode 100644 index 0000000000..b739fe2b5a --- /dev/null +++ b/src/southbridge/amd/sb700/sb700_enable_usbdebug.c @@ -0,0 +1,36 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2010 Advanced Micro Devices, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef SB700_DEVN_BASE + +#define SB700_DEVN_BASE 0 + +#endif + +#define EHCI_BAR_INDEX 0x10 +#define EHCI_BAR 0xFEF00000 +#define EHCI_DEBUG_OFFSET 0xE0 + +static void sb700_enable_usbdebug_direct(u32 port) +{ + set_debug_port(port); + pci_write_config32(PCI_DEV(0, SB700_DEVN_BASE + 0x13, 5), + EHCI_BAR_INDEX, EHCI_BAR); + pci_write_config8(PCI_DEV(0, SB700_DEVN_BASE + 0x13, 5), 0x04, 0x2); /* mem space enabe */ +} diff --git a/src/southbridge/amd/sb700/sb700_enable_usbdebug_direct.c b/src/southbridge/amd/sb700/sb700_enable_usbdebug_direct.c deleted file mode 100644 index b739fe2b5a..0000000000 --- a/src/southbridge/amd/sb700/sb700_enable_usbdebug_direct.c +++ /dev/null @@ -1,36 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2010 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#ifndef SB700_DEVN_BASE - -#define SB700_DEVN_BASE 0 - -#endif - -#define EHCI_BAR_INDEX 0x10 -#define EHCI_BAR 0xFEF00000 -#define EHCI_DEBUG_OFFSET 0xE0 - -static void sb700_enable_usbdebug_direct(u32 port) -{ - set_debug_port(port); - pci_write_config32(PCI_DEV(0, SB700_DEVN_BASE + 0x13, 5), - EHCI_BAR_INDEX, EHCI_BAR); - pci_write_config8(PCI_DEV(0, SB700_DEVN_BASE + 0x13, 5), 0x04, 0x2); /* mem space enabe */ -} diff --git a/src/southbridge/amd/sb700/sb700_usb.c b/src/southbridge/amd/sb700/sb700_usb.c index d2dcf852f2..3b08798209 100644 --- a/src/southbridge/amd/sb700/sb700_usb.c +++ b/src/southbridge/amd/sb700/sb700_usb.c @@ -22,7 +22,7 @@ #include #include #include -#include +#include #include #include "sb700.h" diff --git a/src/southbridge/intel/i82801gx/i82801gx_usb_ehci.c b/src/southbridge/intel/i82801gx/i82801gx_usb_ehci.c index 1bc5fcaecb..530518c8e2 100644 --- a/src/southbridge/intel/i82801gx/i82801gx_usb_ehci.c +++ b/src/southbridge/intel/i82801gx/i82801gx_usb_ehci.c @@ -24,7 +24,7 @@ #include #include "i82801gx.h" #if CONFIG_USBDEBUG_DIRECT -#include +#include #endif #include diff --git a/src/southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c b/src/southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c new file mode 100644 index 0000000000..1c7a26bffc --- /dev/null +++ b/src/southbridge/nvidia/mcp55/mcp55_enable_usbdebug.c @@ -0,0 +1,50 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2004 Tyan Computer + * Written by Yinghai Lu for Tyan Computer. + * Copyright (C) 2006,2007 AMD + * Written by Yinghai Lu for AMD. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#if CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20 + #define MCP55_DEVN_BASE CONFIG_HT_CHAIN_END_UNITID_BASE +#else + #define MCP55_DEVN_BASE CONFIG_HT_CHAIN_UNITID_BASE +#endif + +#define EHCI_BAR_INDEX 0x10 +#define EHCI_BAR 0xFEF00000 +#define EHCI_DEBUG_OFFSET 0x98 + +static void set_debug_port(unsigned port) +{ + uint32_t dword; + dword = pci_read_config32(PCI_DEV(0, MCP55_DEVN_BASE+2, 1), 0x74); + dword &= ~(0xf<<12); + dword |= (port<<12); + pci_write_config32(PCI_DEV(0, MCP55_DEVN_BASE+2, 1), 0x74, dword); + +} + +static void mcp55_enable_usbdebug_direct(unsigned port) +{ + set_debug_port(port); + pci_write_config32(PCI_DEV(0, MCP55_DEVN_BASE+2, 1), EHCI_BAR_INDEX, EHCI_BAR); + pci_write_config8(PCI_DEV(0, MCP55_DEVN_BASE+2, 1), 0x04, 0x2); // mem space enabe +} + diff --git a/src/southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c b/src/southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c deleted file mode 100644 index 1c7a26bffc..0000000000 --- a/src/southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c +++ /dev/null @@ -1,50 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2004 Tyan Computer - * Written by Yinghai Lu for Tyan Computer. - * Copyright (C) 2006,2007 AMD - * Written by Yinghai Lu for AMD. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#if CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20 - #define MCP55_DEVN_BASE CONFIG_HT_CHAIN_END_UNITID_BASE -#else - #define MCP55_DEVN_BASE CONFIG_HT_CHAIN_UNITID_BASE -#endif - -#define EHCI_BAR_INDEX 0x10 -#define EHCI_BAR 0xFEF00000 -#define EHCI_DEBUG_OFFSET 0x98 - -static void set_debug_port(unsigned port) -{ - uint32_t dword; - dword = pci_read_config32(PCI_DEV(0, MCP55_DEVN_BASE+2, 1), 0x74); - dword &= ~(0xf<<12); - dword |= (port<<12); - pci_write_config32(PCI_DEV(0, MCP55_DEVN_BASE+2, 1), 0x74, dword); - -} - -static void mcp55_enable_usbdebug_direct(unsigned port) -{ - set_debug_port(port); - pci_write_config32(PCI_DEV(0, MCP55_DEVN_BASE+2, 1), EHCI_BAR_INDEX, EHCI_BAR); - pci_write_config8(PCI_DEV(0, MCP55_DEVN_BASE+2, 1), 0x04, 0x2); // mem space enabe -} - diff --git a/src/southbridge/nvidia/mcp55/mcp55_usb2.c b/src/southbridge/nvidia/mcp55/mcp55_usb2.c index 86c124c690..cf603848ad 100644 --- a/src/southbridge/nvidia/mcp55/mcp55_usb2.c +++ b/src/southbridge/nvidia/mcp55/mcp55_usb2.c @@ -28,7 +28,7 @@ #include #include "mcp55.h" #if CONFIG_USBDEBUG_DIRECT -#include +#include #endif extern struct ehci_debug_info dbg_info; diff --git a/src/southbridge/sis/sis966/sis966_enable_usbdebug.c b/src/southbridge/sis/sis966/sis966_enable_usbdebug.c new file mode 100644 index 0000000000..f17a79e6c4 --- /dev/null +++ b/src/southbridge/sis/sis966/sis966_enable_usbdebug.c @@ -0,0 +1,50 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2004 Tyan Computer + * Written by Yinghai Lu for Tyan Computer. + * Copyright (C) 2006,2007 AMD + * Written by Yinghai Lu for AMD. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#if CONFIG_HT_CHAIN_END_UNITID_BASE < CONFIG_HT_CHAIN_UNITID_BASE + #define SIS966_DEVN_BASE CONFIG_HT_CHAIN_END_UNITID_BASE +#else + #define SIS966_DEVN_BASE CONFIG_HT_CHAIN_UNITID_BASE +#endif + +#define EHCI_BAR_INDEX 0x10 +#define EHCI_BAR 0xFEF00000 +#define EHCI_DEBUG_OFFSET 0x98 + +static void set_debug_port(unsigned port) +{ + uint32_t dword; + dword = pci_read_config32(PCI_DEV(0, SIS966_DEVN_BASE+2, 1), 0x74); + dword &= ~(0xf<<12); + dword |= (port<<12); + pci_write_config32(PCI_DEV(0, SIS966_DEVN_BASE+2, 1), 0x74, dword); + +} + +static void sis966_enable_usbdebug_direct(unsigned port) +{ + set_debug_port(port); + pci_write_config32(PCI_DEV(0, SIS966_DEVN_BASE+2, 1), EHCI_BAR_INDEX, EHCI_BAR); + pci_write_config8(PCI_DEV(0, SIS966_DEVN_BASE+2, 1), 0x04, 0x2); // mem space enabe +} + diff --git a/src/southbridge/sis/sis966/sis966_enable_usbdebug_direct.c b/src/southbridge/sis/sis966/sis966_enable_usbdebug_direct.c deleted file mode 100644 index f17a79e6c4..0000000000 --- a/src/southbridge/sis/sis966/sis966_enable_usbdebug_direct.c +++ /dev/null @@ -1,50 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2004 Tyan Computer - * Written by Yinghai Lu for Tyan Computer. - * Copyright (C) 2006,2007 AMD - * Written by Yinghai Lu for AMD. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#if CONFIG_HT_CHAIN_END_UNITID_BASE < CONFIG_HT_CHAIN_UNITID_BASE - #define SIS966_DEVN_BASE CONFIG_HT_CHAIN_END_UNITID_BASE -#else - #define SIS966_DEVN_BASE CONFIG_HT_CHAIN_UNITID_BASE -#endif - -#define EHCI_BAR_INDEX 0x10 -#define EHCI_BAR 0xFEF00000 -#define EHCI_DEBUG_OFFSET 0x98 - -static void set_debug_port(unsigned port) -{ - uint32_t dword; - dword = pci_read_config32(PCI_DEV(0, SIS966_DEVN_BASE+2, 1), 0x74); - dword &= ~(0xf<<12); - dword |= (port<<12); - pci_write_config32(PCI_DEV(0, SIS966_DEVN_BASE+2, 1), 0x74, dword); - -} - -static void sis966_enable_usbdebug_direct(unsigned port) -{ - set_debug_port(port); - pci_write_config32(PCI_DEV(0, SIS966_DEVN_BASE+2, 1), EHCI_BAR_INDEX, EHCI_BAR); - pci_write_config8(PCI_DEV(0, SIS966_DEVN_BASE+2, 1), 0x04, 0x2); // mem space enabe -} - diff --git a/src/southbridge/sis/sis966/sis966_usb2.c b/src/southbridge/sis/sis966/sis966_usb2.c index 108cfee894..9d0fa15a57 100644 --- a/src/southbridge/sis/sis966/sis966_usb2.c +++ b/src/southbridge/sis/sis966/sis966_usb2.c @@ -31,7 +31,7 @@ #include #include "sis966.h" #if CONFIG_USBDEBUG_DIRECT -#include +#include #endif extern struct ehci_debug_info dbg_info; -- cgit v1.2.3