From d88d2da813889b4cdb4bc73492a0ca280667905b Mon Sep 17 00:00:00 2001 From: Wisley Chen Date: Thu, 28 Oct 2021 17:27:39 +0600 Subject: mb/google/brya/var/redrix: Disable autonomous GPIO power management With cr50 fw 0.3.22 or older version, it needs to disable autonomous GPIO power management and then can update cr50 fw successfully. BUG=b:202246591 TEST=FW_NAME=redrix emerge-brya coreboot chromeos-bootimage. Change-Id: Idc01ebb4d3ef990f24f18bef5424b7d6ba683d49 Signed-off-by: Wisley Chen Reviewed-on: https://review.coreboot.org/c/coreboot/+/58694 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak --- src/mainboard/google/brya/variants/redrix/overridetree.cb | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) (limited to 'src') diff --git a/src/mainboard/google/brya/variants/redrix/overridetree.cb b/src/mainboard/google/brya/variants/redrix/overridetree.cb index 878fd56d52..67cb7f3b74 100644 --- a/src/mainboard/google/brya/variants/redrix/overridetree.cb +++ b/src/mainboard/google/brya/variants/redrix/overridetree.cb @@ -31,8 +31,17 @@ fw_config end end chip soc/intel/alderlake + # This disables autonomous GPIO power management, otherwise + # old cr50 FW only supports short pulses; need to clarify + # the minimum PCH IRQ pulse width with Intel, b/180111628 + register "gpio_override_pm" = "1" + register "gpio_pm[COMM_0]" = "0" + register "gpio_pm[COMM_1]" = "0" + register "gpio_pm[COMM_2]" = "0" + register "gpio_pm[COMM_3]" = "0" + register "gpio_pm[COMM_4]" = "0" + register "gpio_pm[COMM_5]" = "0" register "SaGv" = "SaGv_Enabled" - register "CnviBtAudioOffload" = "true" # FIVR RFI Spread Spectrum 6% register "FivrSpreadSpectrum" = "FIVR_SS_6" -- cgit v1.2.3