From d77c764dd1181204b6682b657e561d0a929cf4c7 Mon Sep 17 00:00:00 2001 From: Marshall Dawson Date: Wed, 29 Nov 2017 09:46:28 -0700 Subject: amd/stoneyridge: Move SB index/data pairs to iomap.h Relocate the I/O registers to the iomap for PM, PM2, and BIOSRAM. Change-Id: I3a59adc974a8a90bfc586188b829a7252356b3cb Signed-off-by: Marshall Dawson Reviewed-on: https://review.coreboot.org/22723 Reviewed-by: Aaron Durbin Tested-by: build bot (Jenkins) --- src/soc/amd/stoneyridge/include/soc/iomap.h | 6 ++++++ src/soc/amd/stoneyridge/include/soc/southbridge.h | 9 +-------- 2 files changed, 7 insertions(+), 8 deletions(-) (limited to 'src') diff --git a/src/soc/amd/stoneyridge/include/soc/iomap.h b/src/soc/amd/stoneyridge/include/soc/iomap.h index ac340a62af..2d42ad9ad9 100644 --- a/src/soc/amd/stoneyridge/include/soc/iomap.h +++ b/src/soc/amd/stoneyridge/include/soc/iomap.h @@ -51,6 +51,12 @@ #define ACPI_GPE0_BLK (STONEYRIDGE_ACPI_IO_BASE + 0x10) /* 8 bytes */ #define ACPI_PM_TMR_BLK (STONEYRIDGE_ACPI_IO_BASE + 0x18) /* 4 bytes */ #define SMB_BASE_ADDR 0xb00 +#define PM2_INDEX 0xcd0 +#define PM2_DATA 0xcd1 +#define BIOSRAM_INDEX 0xcd4 +#define BIOSRAM_DATA 0xcd5 +#define PM_INDEX 0xcd6 +#define PM_DATA 0xcd7 #define AB_INDX 0xcd8 #define AB_DATA (AB_INDX+4) #define SYS_RESET 0xcf9 diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h index d9016bc427..73e9b6fcd5 100644 --- a/src/soc/amd/stoneyridge/include/soc/southbridge.h +++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h @@ -30,14 +30,7 @@ #define PSP_BAR_ENABLES 0x48 #define PSP_MAILBOX_BAR_EN 0x10 -/* Power management index/data registers */ -#define BIOSRAM_INDEX 0xcd4 -#define BIOSRAM_DATA 0xcd5 -#define PM_INDEX 0xcd6 -#define PM_DATA 0xcd7 -#define PM2_INDEX 0xcd0 -#define PM2_DATA 0xcd1 - +/* Power management registers: 0xfed80300 or index/data at IO 0xcd6/cd7 */ #define PM_PCI_CTRL 0x08 #define FORCE_SLPSTATE_RETRY BIT(25) #define FORCE_STPCLK_RETRY BIT(24) -- cgit v1.2.3