From d0037efda9e9ce855279d21b891d29edbfb664fb Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Thu, 18 Jan 2024 12:38:34 -0700 Subject: soc/*: Rename Makefiles from .inc to .mk MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The .inc suffix is confusing to various tools as it's not specific to Makefiles. This means that editors don't recognize the files, and don't open them with highlighting and any other specific editor functionality. This issue is also seen in the release notes generation script where Makefiles get renamed before running cloc. Signed-off-by: Martin Roth Change-Id: I6f502b97864fd7782e514ee2daa902d2081633a2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/80074 Reviewed-by: Maximilian Brune Reviewed-by: Michael Niewöhner Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans Reviewed-by: Felix Singer --- src/soc/cavium/cn81xx/Makefile.inc | 61 ----------- src/soc/cavium/cn81xx/Makefile.mk | 61 +++++++++++ src/soc/cavium/common/Makefile.inc | 50 --------- src/soc/cavium/common/Makefile.mk | 50 +++++++++ src/soc/cavium/common/pci/Makefile.inc | 2 - src/soc/cavium/common/pci/Makefile.mk | 2 + src/soc/example/min86/Makefile.inc | 14 --- src/soc/example/min86/Makefile.mk | 14 +++ src/soc/mediatek/mt8173/Makefile.inc | 87 --------------- src/soc/mediatek/mt8173/Makefile.mk | 87 +++++++++++++++ src/soc/mediatek/mt8183/Makefile.inc | 103 ------------------ src/soc/mediatek/mt8183/Makefile.mk | 103 ++++++++++++++++++ src/soc/mediatek/mt8186/Makefile.inc | 86 --------------- src/soc/mediatek/mt8186/Makefile.mk | 86 +++++++++++++++ src/soc/mediatek/mt8188/Makefile.inc | 96 ----------------- src/soc/mediatek/mt8188/Makefile.mk | 96 +++++++++++++++++ src/soc/mediatek/mt8192/Makefile.inc | 88 ---------------- src/soc/mediatek/mt8192/Makefile.mk | 88 ++++++++++++++++ src/soc/mediatek/mt8195/Makefile.inc | 104 ------------------ src/soc/mediatek/mt8195/Makefile.mk | 104 ++++++++++++++++++ src/soc/nvidia/tegra124/Makefile.inc | 98 ----------------- src/soc/nvidia/tegra124/Makefile.mk | 98 +++++++++++++++++ src/soc/nvidia/tegra210/Makefile.inc | 161 ---------------------------- src/soc/nvidia/tegra210/Makefile.mk | 161 ++++++++++++++++++++++++++++ src/soc/qualcomm/ipq40xx/Makefile.inc | 71 ------------- src/soc/qualcomm/ipq40xx/Makefile.mk | 71 +++++++++++++ src/soc/qualcomm/ipq806x/Makefile.inc | 77 -------------- src/soc/qualcomm/ipq806x/Makefile.mk | 77 ++++++++++++++ src/soc/qualcomm/qcs405/Makefile.inc | 31 ------ src/soc/qualcomm/qcs405/Makefile.mk | 31 ++++++ src/soc/qualcomm/sc7180/Makefile.inc | 156 --------------------------- src/soc/qualcomm/sc7180/Makefile.mk | 156 +++++++++++++++++++++++++++ src/soc/qualcomm/sc7280/Makefile.inc | 180 -------------------------------- src/soc/qualcomm/sc7280/Makefile.mk | 180 ++++++++++++++++++++++++++++++++ src/soc/rockchip/rk3288/Makefile.inc | 68 ------------ src/soc/rockchip/rk3288/Makefile.mk | 68 ++++++++++++ src/soc/rockchip/rk3399/Makefile.inc | 75 ------------- src/soc/rockchip/rk3399/Makefile.mk | 75 +++++++++++++ src/soc/samsung/exynos5250/Makefile.inc | 53 ---------- src/soc/samsung/exynos5250/Makefile.mk | 53 ++++++++++ src/soc/samsung/exynos5420/Makefile.inc | 55 ---------- src/soc/samsung/exynos5420/Makefile.mk | 55 ++++++++++ src/soc/sifive/fu540/Makefile.inc | 34 ------ src/soc/sifive/fu540/Makefile.mk | 34 ++++++ src/soc/ti/Makefile.inc | 2 - src/soc/ti/Makefile.mk | 2 + src/soc/ti/am335x/Makefile.inc | 51 --------- src/soc/ti/am335x/Makefile.mk | 51 +++++++++ src/soc/ucb/riscv/Makefile.inc | 10 -- src/soc/ucb/riscv/Makefile.mk | 10 ++ 50 files changed, 1813 insertions(+), 1813 deletions(-) delete mode 100644 src/soc/cavium/cn81xx/Makefile.inc create mode 100644 src/soc/cavium/cn81xx/Makefile.mk delete mode 100644 src/soc/cavium/common/Makefile.inc create mode 100644 src/soc/cavium/common/Makefile.mk delete mode 100644 src/soc/cavium/common/pci/Makefile.inc create mode 100644 src/soc/cavium/common/pci/Makefile.mk delete mode 100644 src/soc/example/min86/Makefile.inc create mode 100644 src/soc/example/min86/Makefile.mk delete mode 100644 src/soc/mediatek/mt8173/Makefile.inc create mode 100644 src/soc/mediatek/mt8173/Makefile.mk delete mode 100644 src/soc/mediatek/mt8183/Makefile.inc create mode 100644 src/soc/mediatek/mt8183/Makefile.mk delete mode 100644 src/soc/mediatek/mt8186/Makefile.inc create mode 100644 src/soc/mediatek/mt8186/Makefile.mk delete mode 100644 src/soc/mediatek/mt8188/Makefile.inc create mode 100644 src/soc/mediatek/mt8188/Makefile.mk delete mode 100644 src/soc/mediatek/mt8192/Makefile.inc create mode 100644 src/soc/mediatek/mt8192/Makefile.mk delete mode 100644 src/soc/mediatek/mt8195/Makefile.inc create mode 100644 src/soc/mediatek/mt8195/Makefile.mk delete mode 100644 src/soc/nvidia/tegra124/Makefile.inc create mode 100644 src/soc/nvidia/tegra124/Makefile.mk delete mode 100644 src/soc/nvidia/tegra210/Makefile.inc create mode 100644 src/soc/nvidia/tegra210/Makefile.mk delete mode 100644 src/soc/qualcomm/ipq40xx/Makefile.inc create mode 100644 src/soc/qualcomm/ipq40xx/Makefile.mk delete mode 100644 src/soc/qualcomm/ipq806x/Makefile.inc create mode 100644 src/soc/qualcomm/ipq806x/Makefile.mk delete mode 100644 src/soc/qualcomm/qcs405/Makefile.inc create mode 100644 src/soc/qualcomm/qcs405/Makefile.mk delete mode 100644 src/soc/qualcomm/sc7180/Makefile.inc create mode 100644 src/soc/qualcomm/sc7180/Makefile.mk delete mode 100644 src/soc/qualcomm/sc7280/Makefile.inc create mode 100644 src/soc/qualcomm/sc7280/Makefile.mk delete mode 100644 src/soc/rockchip/rk3288/Makefile.inc create mode 100644 src/soc/rockchip/rk3288/Makefile.mk delete mode 100644 src/soc/rockchip/rk3399/Makefile.inc create mode 100644 src/soc/rockchip/rk3399/Makefile.mk delete mode 100644 src/soc/samsung/exynos5250/Makefile.inc create mode 100644 src/soc/samsung/exynos5250/Makefile.mk delete mode 100644 src/soc/samsung/exynos5420/Makefile.inc create mode 100644 src/soc/samsung/exynos5420/Makefile.mk delete mode 100644 src/soc/sifive/fu540/Makefile.inc create mode 100644 src/soc/sifive/fu540/Makefile.mk delete mode 100644 src/soc/ti/Makefile.inc create mode 100644 src/soc/ti/Makefile.mk delete mode 100644 src/soc/ti/am335x/Makefile.inc create mode 100644 src/soc/ti/am335x/Makefile.mk delete mode 100644 src/soc/ucb/riscv/Makefile.inc create mode 100644 src/soc/ucb/riscv/Makefile.mk (limited to 'src') diff --git a/src/soc/cavium/cn81xx/Makefile.inc b/src/soc/cavium/cn81xx/Makefile.inc deleted file mode 100644 index 89d8fb6eff..0000000000 --- a/src/soc/cavium/cn81xx/Makefile.inc +++ /dev/null @@ -1,61 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -ifeq ($(CONFIG_SOC_CAVIUM_CN81XX),y) - -# bootblock -bootblock-$(CONFIG_BOOTBLOCK_CUSTOM) += bootblock_custom.S -bootblock-y += bootblock.c -bootblock-y += twsi.c -bootblock-y += clock.c -bootblock-y += gpio.c -bootblock-y += timer.c -bootblock-y += spi.c -bootblock-y += uart.c -bootblock-y += cpu.c - -################################################################################ -# verstage - -verstage-y += twsi.c -verstage-y += clock.c -verstage-y += gpio.c -verstage-y += timer.c -verstage-y += spi.c -verstage-y += uart.c - -################################################################################ -# romstage - -romstage-y += twsi.c -romstage-y += clock.c -romstage-y += gpio.c -romstage-y += timer.c -romstage-y += spi.c -romstage-y += uart.c -romstage-y += cbmem.c - -romstage-y += sdram.c -romstage-y += mmu.c - -################################################################################ -# ramstage - -ramstage-y += twsi.c -ramstage-y += clock.c -ramstage-y += gpio.c -ramstage-y += timer.c -ramstage-y += spi.c -ramstage-y += uart.c -ramstage-y += sdram.c -ramstage-y += soc.c -ramstage-y += cpu.c -ramstage-y += cpu_secondary.S -ramstage-y += ecam0.c - -ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += bl31_plat_params.c - -BL31_MAKEARGS += PLAT=t81 M0_CROSS_COMPILE="$(CROSS_COMPILE_arm)" ENABLE_SPE_FOR_LOWER_ELS=0 - -CPPFLAGS_common += -Isrc/soc/cavium/cn81xx/include - -endif diff --git a/src/soc/cavium/cn81xx/Makefile.mk b/src/soc/cavium/cn81xx/Makefile.mk new file mode 100644 index 0000000000..89d8fb6eff --- /dev/null +++ b/src/soc/cavium/cn81xx/Makefile.mk @@ -0,0 +1,61 @@ +## SPDX-License-Identifier: GPL-2.0-only + +ifeq ($(CONFIG_SOC_CAVIUM_CN81XX),y) + +# bootblock +bootblock-$(CONFIG_BOOTBLOCK_CUSTOM) += bootblock_custom.S +bootblock-y += bootblock.c +bootblock-y += twsi.c +bootblock-y += clock.c +bootblock-y += gpio.c +bootblock-y += timer.c +bootblock-y += spi.c +bootblock-y += uart.c +bootblock-y += cpu.c + +################################################################################ +# verstage + +verstage-y += twsi.c +verstage-y += clock.c +verstage-y += gpio.c +verstage-y += timer.c +verstage-y += spi.c +verstage-y += uart.c + +################################################################################ +# romstage + +romstage-y += twsi.c +romstage-y += clock.c +romstage-y += gpio.c +romstage-y += timer.c +romstage-y += spi.c +romstage-y += uart.c +romstage-y += cbmem.c + +romstage-y += sdram.c +romstage-y += mmu.c + +################################################################################ +# ramstage + +ramstage-y += twsi.c +ramstage-y += clock.c +ramstage-y += gpio.c +ramstage-y += timer.c +ramstage-y += spi.c +ramstage-y += uart.c +ramstage-y += sdram.c +ramstage-y += soc.c +ramstage-y += cpu.c +ramstage-y += cpu_secondary.S +ramstage-y += ecam0.c + +ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += bl31_plat_params.c + +BL31_MAKEARGS += PLAT=t81 M0_CROSS_COMPILE="$(CROSS_COMPILE_arm)" ENABLE_SPE_FOR_LOWER_ELS=0 + +CPPFLAGS_common += -Isrc/soc/cavium/cn81xx/include + +endif diff --git a/src/soc/cavium/common/Makefile.inc b/src/soc/cavium/common/Makefile.inc deleted file mode 100644 index 6fa2c31fb1..0000000000 --- a/src/soc/cavium/common/Makefile.inc +++ /dev/null @@ -1,50 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -ifeq ($(CONFIG_SOC_CAVIUM_COMMON),y) - -subdirs-y += pci - -# -Wstack-usage doesn't recognize hexadecimal numbers. -ifeq ($(CONFIG_COMPILER_GCC),y) -CFLAGS_arm64 += -Wstack-usage=$(shell printf "%d" $(CONFIG_STACK_SIZE)) -endif - -bootblock-$(CONFIG_BOOTBLOCK_CUSTOM) += bootblock.c - -################################################################################ -# romstage - -romstage-y += bdk-coreboot.c -romstage-y += ecam.c - -################################################################################ -# ramstage - -ramstage-y += bdk-coreboot.c -ramstage-y += ecam.c - -CPPFLAGS_common += -Isrc/soc/cavium/common/include - -ROM_HEADER_BIN := $(objgenerated)/rom_header.bin -ROM_HEADER_SOURCES += rom_clib_s_nbl1fw -ROM_HEADER_SOURCES += rom_csib_s_nbl1fw - -ROM_HEADER_DEPS := $(foreach f, $(ROM_HEADER_SOURCES), src/soc/cavium/common/$(f).bin.hex) - -# Include ROM header -$(ROM_HEADER_BIN): $(ROM_HEADER_DEPS) - for f in $+; \ - do for c in $$(cat $$f | grep -v ^#); \ - do printf $$(printf '\%o' 0x$$c); \ - done; \ - done > $@ - -$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin $(ROM_HEADER_BIN) - @printf " GEN $(subst $(obj)/,,$(@))\n" - dd if=/dev/zero ibs=1 count=$$(($(shell stat --printf="%s" $(objcbfs)/bootblock.raw.bin) + 0x10000)) of=$@ status=none - # Insert CLIB at 0x0 and CSIB at 0x100 - dd if=$(ROM_HEADER_BIN) of=$@ bs=1 seek=0 conv=notrunc status=none - # Insert bootblock at 0x10000 - dd if=$(objcbfs)/bootblock.raw.bin of=$@ bs=1 seek=$$((0x10000)) conv=notrunc status=none - -endif diff --git a/src/soc/cavium/common/Makefile.mk b/src/soc/cavium/common/Makefile.mk new file mode 100644 index 0000000000..6fa2c31fb1 --- /dev/null +++ b/src/soc/cavium/common/Makefile.mk @@ -0,0 +1,50 @@ +## SPDX-License-Identifier: GPL-2.0-only + +ifeq ($(CONFIG_SOC_CAVIUM_COMMON),y) + +subdirs-y += pci + +# -Wstack-usage doesn't recognize hexadecimal numbers. +ifeq ($(CONFIG_COMPILER_GCC),y) +CFLAGS_arm64 += -Wstack-usage=$(shell printf "%d" $(CONFIG_STACK_SIZE)) +endif + +bootblock-$(CONFIG_BOOTBLOCK_CUSTOM) += bootblock.c + +################################################################################ +# romstage + +romstage-y += bdk-coreboot.c +romstage-y += ecam.c + +################################################################################ +# ramstage + +ramstage-y += bdk-coreboot.c +ramstage-y += ecam.c + +CPPFLAGS_common += -Isrc/soc/cavium/common/include + +ROM_HEADER_BIN := $(objgenerated)/rom_header.bin +ROM_HEADER_SOURCES += rom_clib_s_nbl1fw +ROM_HEADER_SOURCES += rom_csib_s_nbl1fw + +ROM_HEADER_DEPS := $(foreach f, $(ROM_HEADER_SOURCES), src/soc/cavium/common/$(f).bin.hex) + +# Include ROM header +$(ROM_HEADER_BIN): $(ROM_HEADER_DEPS) + for f in $+; \ + do for c in $$(cat $$f | grep -v ^#); \ + do printf $$(printf '\%o' 0x$$c); \ + done; \ + done > $@ + +$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin $(ROM_HEADER_BIN) + @printf " GEN $(subst $(obj)/,,$(@))\n" + dd if=/dev/zero ibs=1 count=$$(($(shell stat --printf="%s" $(objcbfs)/bootblock.raw.bin) + 0x10000)) of=$@ status=none + # Insert CLIB at 0x0 and CSIB at 0x100 + dd if=$(ROM_HEADER_BIN) of=$@ bs=1 seek=0 conv=notrunc status=none + # Insert bootblock at 0x10000 + dd if=$(objcbfs)/bootblock.raw.bin of=$@ bs=1 seek=$$((0x10000)) conv=notrunc status=none + +endif diff --git a/src/soc/cavium/common/pci/Makefile.inc b/src/soc/cavium/common/pci/Makefile.inc deleted file mode 100644 index 0569ba61b3..0000000000 --- a/src/soc/cavium/common/pci/Makefile.inc +++ /dev/null @@ -1,2 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ramstage-y += uart.c diff --git a/src/soc/cavium/common/pci/Makefile.mk b/src/soc/cavium/common/pci/Makefile.mk new file mode 100644 index 0000000000..0569ba61b3 --- /dev/null +++ b/src/soc/cavium/common/pci/Makefile.mk @@ -0,0 +1,2 @@ +## SPDX-License-Identifier: GPL-2.0-only +ramstage-y += uart.c diff --git a/src/soc/example/min86/Makefile.inc b/src/soc/example/min86/Makefile.inc deleted file mode 100644 index 01f1a94bc4..0000000000 --- a/src/soc/example/min86/Makefile.inc +++ /dev/null @@ -1,14 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ifeq ($(CONFIG_SOC_EXAMPLE_MIN86),y) - -bootblock-y += cache_as_ram.S -bootblock-y += ../../../cpu/intel/car/bootblock.c - -postcar-y += exit_car.S - -romstage-y += romstage.c - -ramstage-y += chip.c -ramstage-y += timer.c - -endif diff --git a/src/soc/example/min86/Makefile.mk b/src/soc/example/min86/Makefile.mk new file mode 100644 index 0000000000..01f1a94bc4 --- /dev/null +++ b/src/soc/example/min86/Makefile.mk @@ -0,0 +1,14 @@ +## SPDX-License-Identifier: GPL-2.0-only +ifeq ($(CONFIG_SOC_EXAMPLE_MIN86),y) + +bootblock-y += cache_as_ram.S +bootblock-y += ../../../cpu/intel/car/bootblock.c + +postcar-y += exit_car.S + +romstage-y += romstage.c + +ramstage-y += chip.c +ramstage-y += timer.c + +endif diff --git a/src/soc/mediatek/mt8173/Makefile.inc b/src/soc/mediatek/mt8173/Makefile.inc deleted file mode 100644 index 7688ecfd45..0000000000 --- a/src/soc/mediatek/mt8173/Makefile.inc +++ /dev/null @@ -1,87 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -ifeq ($(CONFIG_SOC_MEDIATEK_MT8173),y) - -bootblock-y += bootblock.c -bootblock-$(CONFIG_SPI_FLASH) += ../common/flash_controller.c -bootblock-y += ../common/i2c.c i2c.c -bootblock-y += ../common/pll.c pll.c -bootblock-y += ../common/spi.c spi.c -bootblock-y += ../common/timer.c -bootblock-y += timer.c - -bootblock-y += ../common/uart.c - -bootblock-y += ../common/gpio.c gpio.c gpio_init.c -bootblock-y += ../common/pmic_wrap.c pmic_wrap.c mt6391.c -bootblock-y += ../common/wdt.c ../common/reset.c -bootblock-y += ../common/mmu_operations.c mmu_operations.c - -################################################################################ - -verstage-y += ../common/i2c.c i2c.c -verstage-y += ../common/spi.c spi.c - -verstage-y += ../common/uart.c - -verstage-y += ../common/timer.c -verstage-y += timer.c -verstage-y += ../common/wdt.c ../common/reset.c -verstage-$(CONFIG_SPI_FLASH) += ../common/flash_controller.c -verstage-y += ../common/gpio.c gpio.c - -################################################################################ - -romstage-$(CONFIG_SPI_FLASH) += ../common/flash_controller.c -romstage-y += ../common/pll.c pll.c -romstage-y += ../common/timer.c -romstage-y += timer.c -romstage-y += ../common/i2c.c i2c.c - -romstage-y += ../common/uart.c -romstage-y += ../common/cbmem.c -romstage-y += ../common/gpio.c gpio.c -romstage-y += ../common/spi.c spi.c -romstage-y += ../common/pmic_wrap.c pmic_wrap.c mt6391.c -romstage-y += memory.c -romstage-y += emi.c dramc_pi_basic_api.c dramc_pi_calibration_api.c -romstage-$(CONFIG_MEMORY_TEST) += ../common/memory_test.c -romstage-y += ../common/wdt.c ../common/reset.c -romstage-y += ../common/mmu_operations.c mmu_operations.c -romstage-y += ../common/rtc.c rtc.c - -################################################################################ - -ramstage-y += emi.c -ramstage-y += ../common/spi.c spi.c -ramstage-$(CONFIG_SPI_FLASH) += ../common/flash_controller.c -ramstage-y += soc.c ../common/mtcmos.c -ramstage-y += ../common/timer.c -ramstage-y += timer.c -ramstage-y += ../common/uart.c -ramstage-y += ../common/i2c.c i2c.c -ramstage-y += ../common/pmic_wrap.c pmic_wrap.c mt6391.c -ramstage-y += mt6311.c -ramstage-y += da9212.c -ramstage-y += ../common/gpio.c gpio.c -ramstage-y += ../common/wdt.c ../common/reset.c -ramstage-y += ../common/pll.c pll.c -ramstage-y += ../common/rtc.c rtc.c - -ramstage-y += ../common/usb.c usb.c - -ramstage-y += ../common/ddp.c ddp.c -ramstage-y += ../common/dsi.c dsi.c - -BL31_MAKEARGS += PLAT=mt8173 - -################################################################################ - -# Generate the actual coreboot bootblock code -$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin - ./util/mtkheader/gen-bl-img.py mt8173 sf $< $@ - -CPPFLAGS_common += -Isrc/soc/mediatek/mt8173/include -CPPFLAGS_common += -Isrc/soc/mediatek/common/include - -endif diff --git a/src/soc/mediatek/mt8173/Makefile.mk b/src/soc/mediatek/mt8173/Makefile.mk new file mode 100644 index 0000000000..7688ecfd45 --- /dev/null +++ b/src/soc/mediatek/mt8173/Makefile.mk @@ -0,0 +1,87 @@ +## SPDX-License-Identifier: GPL-2.0-only + +ifeq ($(CONFIG_SOC_MEDIATEK_MT8173),y) + +bootblock-y += bootblock.c +bootblock-$(CONFIG_SPI_FLASH) += ../common/flash_controller.c +bootblock-y += ../common/i2c.c i2c.c +bootblock-y += ../common/pll.c pll.c +bootblock-y += ../common/spi.c spi.c +bootblock-y += ../common/timer.c +bootblock-y += timer.c + +bootblock-y += ../common/uart.c + +bootblock-y += ../common/gpio.c gpio.c gpio_init.c +bootblock-y += ../common/pmic_wrap.c pmic_wrap.c mt6391.c +bootblock-y += ../common/wdt.c ../common/reset.c +bootblock-y += ../common/mmu_operations.c mmu_operations.c + +################################################################################ + +verstage-y += ../common/i2c.c i2c.c +verstage-y += ../common/spi.c spi.c + +verstage-y += ../common/uart.c + +verstage-y += ../common/timer.c +verstage-y += timer.c +verstage-y += ../common/wdt.c ../common/reset.c +verstage-$(CONFIG_SPI_FLASH) += ../common/flash_controller.c +verstage-y += ../common/gpio.c gpio.c + +################################################################################ + +romstage-$(CONFIG_SPI_FLASH) += ../common/flash_controller.c +romstage-y += ../common/pll.c pll.c +romstage-y += ../common/timer.c +romstage-y += timer.c +romstage-y += ../common/i2c.c i2c.c + +romstage-y += ../common/uart.c +romstage-y += ../common/cbmem.c +romstage-y += ../common/gpio.c gpio.c +romstage-y += ../common/spi.c spi.c +romstage-y += ../common/pmic_wrap.c pmic_wrap.c mt6391.c +romstage-y += memory.c +romstage-y += emi.c dramc_pi_basic_api.c dramc_pi_calibration_api.c +romstage-$(CONFIG_MEMORY_TEST) += ../common/memory_test.c +romstage-y += ../common/wdt.c ../common/reset.c +romstage-y += ../common/mmu_operations.c mmu_operations.c +romstage-y += ../common/rtc.c rtc.c + +################################################################################ + +ramstage-y += emi.c +ramstage-y += ../common/spi.c spi.c +ramstage-$(CONFIG_SPI_FLASH) += ../common/flash_controller.c +ramstage-y += soc.c ../common/mtcmos.c +ramstage-y += ../common/timer.c +ramstage-y += timer.c +ramstage-y += ../common/uart.c +ramstage-y += ../common/i2c.c i2c.c +ramstage-y += ../common/pmic_wrap.c pmic_wrap.c mt6391.c +ramstage-y += mt6311.c +ramstage-y += da9212.c +ramstage-y += ../common/gpio.c gpio.c +ramstage-y += ../common/wdt.c ../common/reset.c +ramstage-y += ../common/pll.c pll.c +ramstage-y += ../common/rtc.c rtc.c + +ramstage-y += ../common/usb.c usb.c + +ramstage-y += ../common/ddp.c ddp.c +ramstage-y += ../common/dsi.c dsi.c + +BL31_MAKEARGS += PLAT=mt8173 + +################################################################################ + +# Generate the actual coreboot bootblock code +$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin + ./util/mtkheader/gen-bl-img.py mt8173 sf $< $@ + +CPPFLAGS_common += -Isrc/soc/mediatek/mt8173/include +CPPFLAGS_common += -Isrc/soc/mediatek/common/include + +endif diff --git a/src/soc/mediatek/mt8183/Makefile.inc b/src/soc/mediatek/mt8183/Makefile.inc deleted file mode 100644 index 3b4a1e8ccb..0000000000 --- a/src/soc/mediatek/mt8183/Makefile.inc +++ /dev/null @@ -1,103 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ifeq ($(CONFIG_SOC_MEDIATEK_MT8183),y) - -bootblock-y += bootblock.c -bootblock-y += ../common/auxadc.c -bootblock-y += ../common/gpio.c gpio.c -bootblock-y += ../common/pll.c pll.c -bootblock-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c -bootblock-y += mt8183.c -bootblock-y += ../common/i2c.c i2c.c -bootblock-y += ../common/timer.c -bootblock-y += ../common/uart.c -bootblock-y += ../common/wdt.c - -decompressor-y += decompressor.c -decompressor-y += ../common/mmu_operations.c -decompressor-y += ../common/timer.c - -verstage-y += ../common/auxadc.c -verstage-y += ../common/gpio.c gpio.c -verstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c -verstage-y += mt8183.c -verstage-y += ../common/i2c.c i2c.c -verstage-y += ../common/timer.c -verstage-y += ../common/uart.c -verstage-y += ../common/wdt.c - -romstage-y += ../common/auxadc.c -romstage-y += ../common/cbmem.c emi.c -romstage-y += dramc_init_setting.c -romstage-y += dramc_param.c -romstage-y += dramc_pi_basic_api.c -romstage-y += dramc_pi_calibration_api.c -romstage-y += memory.c -romstage-$(CONFIG_MEMORY_TEST) += ../common/memory_test.c -romstage-y += mt8183.c -romstage-y += ../common/gpio.c gpio.c -romstage-y += ../common/mmu_operations.c mmu_operations.c -romstage-y += ../common/pll.c pll.c -romstage-y += ../common/pmic_wrap.c pmic_wrap.c mt6358.c -romstage-y += ../common/rtc.c ../common/rtc_osc_init.c rtc.c -romstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c -romstage-y += ../common/i2c.c i2c.c -romstage-y += ../common/timer.c -romstage-y += ../common/uart.c -romstage-y += ../common/wdt.c - -ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += ../common/bl31.c -ramstage-y += emi.c -ramstage-y += ../common/auxadc.c -ramstage-y += ../common/ddp.c ddp.c -ramstage-y += ../common/dsi.c ../common/mtk_mipi_dphy.c -ramstage-y += ../common/gpio.c gpio.c -ramstage-y += ../common/i2c.c i2c.c -ramstage-y += ../common/mcu.c -ramstage-y += ../common/mmu_operations.c mmu_operations.c -ramstage-y += ../common/mtcmos.c mtcmos.c -ramstage-y += ../common/pmic_wrap.c -ramstage-y += ../common/rtc.c ../common/rtc_osc_init.c rtc.c -ramstage-y += soc.c -ramstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c -ramstage-y += spm.c -ramstage-y += ../common/sspm.c -ramstage-y += ../common/timer.c -ramstage-y += ../common/uart.c -ramstage-y += ../common/usb.c -ramstage-y += ../common/wdt.c -ramstage-y += md_ctrl.c - -MT8183_BLOB_DIR := 3rdparty/blobs/soc/mediatek/mt8183 - -cbfs-files-y += pcm_allinone_lp4_3200.bin -pcm_allinone_lp4_3200.bin-file := $(MT8183_BLOB_DIR)/pcm_allinone_lp4_3200.bin -pcm_allinone_lp4_3200.bin-type := raw -pcm_allinone_lp4_3200.bin-compression := $(CBFS_COMPRESS_FLAG) - -cbfs-files-y += pcm_allinone_lp4_3733.bin -pcm_allinone_lp4_3733.bin-file := $(MT8183_BLOB_DIR)/pcm_allinone_lp4_3733.bin -pcm_allinone_lp4_3733.bin-type := raw -pcm_allinone_lp4_3733.bin-compression := $(CBFS_COMPRESS_FLAG) - -cbfs-files-y += sspm.bin -sspm.bin-file := $(MT8183_BLOB_DIR)/sspm.bin -sspm.bin-type := raw -sspm.bin-compression := $(CBFS_COMPRESS_FLAG) - -DRAM_CBFS := $(CONFIG_CBFS_PREFIX)/dram -$(DRAM_CBFS)-file := $(MT8183_BLOB_DIR)/dram.elf -$(DRAM_CBFS)-type := stage -$(DRAM_CBFS)-compression := $(CBFS_PRERAM_COMPRESS_FLAG) -ifneq ($(wildcard $($(DRAM_CBFS)-file)),) - cbfs-files-y += $(DRAM_CBFS) -endif - -BL31_MAKEARGS += PLAT=mt8183 - -CPPFLAGS_common += -Isrc/soc/mediatek/mt8183/include -CPPFLAGS_common += -Isrc/soc/mediatek/common/include - -$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin - ./util/mtkheader/gen-bl-img.py mt8183 emmc $< $@ - -endif diff --git a/src/soc/mediatek/mt8183/Makefile.mk b/src/soc/mediatek/mt8183/Makefile.mk new file mode 100644 index 0000000000..3b4a1e8ccb --- /dev/null +++ b/src/soc/mediatek/mt8183/Makefile.mk @@ -0,0 +1,103 @@ +## SPDX-License-Identifier: GPL-2.0-only +ifeq ($(CONFIG_SOC_MEDIATEK_MT8183),y) + +bootblock-y += bootblock.c +bootblock-y += ../common/auxadc.c +bootblock-y += ../common/gpio.c gpio.c +bootblock-y += ../common/pll.c pll.c +bootblock-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c +bootblock-y += mt8183.c +bootblock-y += ../common/i2c.c i2c.c +bootblock-y += ../common/timer.c +bootblock-y += ../common/uart.c +bootblock-y += ../common/wdt.c + +decompressor-y += decompressor.c +decompressor-y += ../common/mmu_operations.c +decompressor-y += ../common/timer.c + +verstage-y += ../common/auxadc.c +verstage-y += ../common/gpio.c gpio.c +verstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c +verstage-y += mt8183.c +verstage-y += ../common/i2c.c i2c.c +verstage-y += ../common/timer.c +verstage-y += ../common/uart.c +verstage-y += ../common/wdt.c + +romstage-y += ../common/auxadc.c +romstage-y += ../common/cbmem.c emi.c +romstage-y += dramc_init_setting.c +romstage-y += dramc_param.c +romstage-y += dramc_pi_basic_api.c +romstage-y += dramc_pi_calibration_api.c +romstage-y += memory.c +romstage-$(CONFIG_MEMORY_TEST) += ../common/memory_test.c +romstage-y += mt8183.c +romstage-y += ../common/gpio.c gpio.c +romstage-y += ../common/mmu_operations.c mmu_operations.c +romstage-y += ../common/pll.c pll.c +romstage-y += ../common/pmic_wrap.c pmic_wrap.c mt6358.c +romstage-y += ../common/rtc.c ../common/rtc_osc_init.c rtc.c +romstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c +romstage-y += ../common/i2c.c i2c.c +romstage-y += ../common/timer.c +romstage-y += ../common/uart.c +romstage-y += ../common/wdt.c + +ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += ../common/bl31.c +ramstage-y += emi.c +ramstage-y += ../common/auxadc.c +ramstage-y += ../common/ddp.c ddp.c +ramstage-y += ../common/dsi.c ../common/mtk_mipi_dphy.c +ramstage-y += ../common/gpio.c gpio.c +ramstage-y += ../common/i2c.c i2c.c +ramstage-y += ../common/mcu.c +ramstage-y += ../common/mmu_operations.c mmu_operations.c +ramstage-y += ../common/mtcmos.c mtcmos.c +ramstage-y += ../common/pmic_wrap.c +ramstage-y += ../common/rtc.c ../common/rtc_osc_init.c rtc.c +ramstage-y += soc.c +ramstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c +ramstage-y += spm.c +ramstage-y += ../common/sspm.c +ramstage-y += ../common/timer.c +ramstage-y += ../common/uart.c +ramstage-y += ../common/usb.c +ramstage-y += ../common/wdt.c +ramstage-y += md_ctrl.c + +MT8183_BLOB_DIR := 3rdparty/blobs/soc/mediatek/mt8183 + +cbfs-files-y += pcm_allinone_lp4_3200.bin +pcm_allinone_lp4_3200.bin-file := $(MT8183_BLOB_DIR)/pcm_allinone_lp4_3200.bin +pcm_allinone_lp4_3200.bin-type := raw +pcm_allinone_lp4_3200.bin-compression := $(CBFS_COMPRESS_FLAG) + +cbfs-files-y += pcm_allinone_lp4_3733.bin +pcm_allinone_lp4_3733.bin-file := $(MT8183_BLOB_DIR)/pcm_allinone_lp4_3733.bin +pcm_allinone_lp4_3733.bin-type := raw +pcm_allinone_lp4_3733.bin-compression := $(CBFS_COMPRESS_FLAG) + +cbfs-files-y += sspm.bin +sspm.bin-file := $(MT8183_BLOB_DIR)/sspm.bin +sspm.bin-type := raw +sspm.bin-compression := $(CBFS_COMPRESS_FLAG) + +DRAM_CBFS := $(CONFIG_CBFS_PREFIX)/dram +$(DRAM_CBFS)-file := $(MT8183_BLOB_DIR)/dram.elf +$(DRAM_CBFS)-type := stage +$(DRAM_CBFS)-compression := $(CBFS_PRERAM_COMPRESS_FLAG) +ifneq ($(wildcard $($(DRAM_CBFS)-file)),) + cbfs-files-y += $(DRAM_CBFS) +endif + +BL31_MAKEARGS += PLAT=mt8183 + +CPPFLAGS_common += -Isrc/soc/mediatek/mt8183/include +CPPFLAGS_common += -Isrc/soc/mediatek/common/include + +$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin + ./util/mtkheader/gen-bl-img.py mt8183 emmc $< $@ + +endif diff --git a/src/soc/mediatek/mt8186/Makefile.inc b/src/soc/mediatek/mt8186/Makefile.inc deleted file mode 100644 index 3a3cc07ce6..0000000000 --- a/src/soc/mediatek/mt8186/Makefile.inc +++ /dev/null @@ -1,86 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ifeq ($(CONFIG_SOC_MEDIATEK_MT8186),y) - -# for bootblock, verstage, romstage, ramstage -all-y += ../common/cpu_id.c -all-y += ../common/flash_controller.c -all-y += ../common/gpio.c ../common/gpio_op.c gpio.c -all-y += ../common/i2c.c i2c.c -all-y += ../common/pll.c pll.c -all-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c -all-y += ../common/timer.c ../common/timer_prepare.c -all-y += ../common/uart.c - -bootblock-y += bootblock.c -bootblock-y += ../common/eint_event.c -bootblock-y += gic.c -bootblock-y += ../common/lastbus_v1.c -bootblock-y += ../common/mmu_operations.c -bootblock-y += ../common/tracker.c ../common/tracker_v1.c -bootblock-y += ../common/wdt.c ../common/wdt_req.c wdt.c - -romstage-y += ../common/cbmem.c -romstage-y += ../common/dram_init.c -romstage-y += ../common/dramc_param.c -romstage-y += ../common/emi.c -romstage-y += ../common/memory.c -romstage-y += ../common/memory_test.c -romstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c -romstage-y += ../common/mt6315.c mt6315.c -romstage-y += ../common/pmic_wrap.c pmic_wrap.c pmif.c mt6366.c -romstage-y += ../common/pmif.c ../common/pmif_clk.c pmif_clk.c -romstage-y += ../common/pmif_spmi.c pmif_spmi.c -romstage-y += ../common/rtc.c ../common/rtc_osc_init.c rtc.c - -ramstage-y += adsp.c -ramstage-y += ../common/auxadc.c -ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += ../common/bl31.c -ramstage-y += ../common/ddp.c ddp.c -ramstage-y += ../common/devapc.c devapc.c -ramstage-y += ../common/dfd.c -ramstage-y += ../common/display.c -ramstage-y += ../common/dsi.c ../common/mtk_mipi_dphy.c -ramstage-y += ../common/emi.c -ramstage-y += ../common/mcu.c -ramstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c -ramstage-$(CONFIG_COMMONLIB_STORAGE_MMC) += ../common/msdc.c msdc.c -ramstage-y += ../common/mtcmos.c mtcmos.c -ramstage-y += ../common/pmic_wrap.c pmic_wrap.c pmif.c mt6366.c -ramstage-y += ../common/rtc.c ../common/rtc_osc_init.c rtc.c -ramstage-y += soc.c -ramstage-y += ../common/spm.c spm.c -ramstage-y += ../common/sspm.c -ramstage-y += ../common/tps65132s.c -ramstage-y += ../common/usb.c usb.c - -CPPFLAGS_common += -Isrc/soc/mediatek/mt8186/include -CPPFLAGS_common += -Isrc/soc/mediatek/common/dp/include -CPPFLAGS_common += -Isrc/soc/mediatek/common/include - -BL31_MAKEARGS += PLAT=mt8186 - -MT8186_BLOB_DIR := 3rdparty/blobs/soc/mediatek/mt8186 - -mcu-firmware-files := \ - $(CONFIG_SSPM_FIRMWARE) \ - $(CONFIG_SPM_FIRMWARE) - -$(foreach fw, $(call strip_quotes,$(mcu-firmware-files)), \ - $(eval $(fw)-file := $(MT8186_BLOB_DIR)/$(fw)) \ - $(eval $(fw)-type := raw) \ - $(eval $(fw)-compression := LZ4) \ - $(if $(wildcard $($(fw)-file)), $(eval cbfs-files-y += $(fw)), ) \ -) - -DRAM_CBFS := $(CONFIG_CBFS_PREFIX)/dram -$(DRAM_CBFS)-file := $(MT8186_BLOB_DIR)/dram.elf -$(DRAM_CBFS)-type := stage -$(DRAM_CBFS)-compression := $(CBFS_PRERAM_COMPRESS_FLAG) -ifneq ($(wildcard $($(DRAM_CBFS)-file)),) - cbfs-files-y += $(DRAM_CBFS) -endif - -$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin - ./util/mtkheader/gen-bl-img.py mt8183 sf $< $@ - -endif diff --git a/src/soc/mediatek/mt8186/Makefile.mk b/src/soc/mediatek/mt8186/Makefile.mk new file mode 100644 index 0000000000..3a3cc07ce6 --- /dev/null +++ b/src/soc/mediatek/mt8186/Makefile.mk @@ -0,0 +1,86 @@ +## SPDX-License-Identifier: GPL-2.0-only +ifeq ($(CONFIG_SOC_MEDIATEK_MT8186),y) + +# for bootblock, verstage, romstage, ramstage +all-y += ../common/cpu_id.c +all-y += ../common/flash_controller.c +all-y += ../common/gpio.c ../common/gpio_op.c gpio.c +all-y += ../common/i2c.c i2c.c +all-y += ../common/pll.c pll.c +all-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c +all-y += ../common/timer.c ../common/timer_prepare.c +all-y += ../common/uart.c + +bootblock-y += bootblock.c +bootblock-y += ../common/eint_event.c +bootblock-y += gic.c +bootblock-y += ../common/lastbus_v1.c +bootblock-y += ../common/mmu_operations.c +bootblock-y += ../common/tracker.c ../common/tracker_v1.c +bootblock-y += ../common/wdt.c ../common/wdt_req.c wdt.c + +romstage-y += ../common/cbmem.c +romstage-y += ../common/dram_init.c +romstage-y += ../common/dramc_param.c +romstage-y += ../common/emi.c +romstage-y += ../common/memory.c +romstage-y += ../common/memory_test.c +romstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c +romstage-y += ../common/mt6315.c mt6315.c +romstage-y += ../common/pmic_wrap.c pmic_wrap.c pmif.c mt6366.c +romstage-y += ../common/pmif.c ../common/pmif_clk.c pmif_clk.c +romstage-y += ../common/pmif_spmi.c pmif_spmi.c +romstage-y += ../common/rtc.c ../common/rtc_osc_init.c rtc.c + +ramstage-y += adsp.c +ramstage-y += ../common/auxadc.c +ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += ../common/bl31.c +ramstage-y += ../common/ddp.c ddp.c +ramstage-y += ../common/devapc.c devapc.c +ramstage-y += ../common/dfd.c +ramstage-y += ../common/display.c +ramstage-y += ../common/dsi.c ../common/mtk_mipi_dphy.c +ramstage-y += ../common/emi.c +ramstage-y += ../common/mcu.c +ramstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c +ramstage-$(CONFIG_COMMONLIB_STORAGE_MMC) += ../common/msdc.c msdc.c +ramstage-y += ../common/mtcmos.c mtcmos.c +ramstage-y += ../common/pmic_wrap.c pmic_wrap.c pmif.c mt6366.c +ramstage-y += ../common/rtc.c ../common/rtc_osc_init.c rtc.c +ramstage-y += soc.c +ramstage-y += ../common/spm.c spm.c +ramstage-y += ../common/sspm.c +ramstage-y += ../common/tps65132s.c +ramstage-y += ../common/usb.c usb.c + +CPPFLAGS_common += -Isrc/soc/mediatek/mt8186/include +CPPFLAGS_common += -Isrc/soc/mediatek/common/dp/include +CPPFLAGS_common += -Isrc/soc/mediatek/common/include + +BL31_MAKEARGS += PLAT=mt8186 + +MT8186_BLOB_DIR := 3rdparty/blobs/soc/mediatek/mt8186 + +mcu-firmware-files := \ + $(CONFIG_SSPM_FIRMWARE) \ + $(CONFIG_SPM_FIRMWARE) + +$(foreach fw, $(call strip_quotes,$(mcu-firmware-files)), \ + $(eval $(fw)-file := $(MT8186_BLOB_DIR)/$(fw)) \ + $(eval $(fw)-type := raw) \ + $(eval $(fw)-compression := LZ4) \ + $(if $(wildcard $($(fw)-file)), $(eval cbfs-files-y += $(fw)), ) \ +) + +DRAM_CBFS := $(CONFIG_CBFS_PREFIX)/dram +$(DRAM_CBFS)-file := $(MT8186_BLOB_DIR)/dram.elf +$(DRAM_CBFS)-type := stage +$(DRAM_CBFS)-compression := $(CBFS_PRERAM_COMPRESS_FLAG) +ifneq ($(wildcard $($(DRAM_CBFS)-file)),) + cbfs-files-y += $(DRAM_CBFS) +endif + +$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin + ./util/mtkheader/gen-bl-img.py mt8183 sf $< $@ + +endif diff --git a/src/soc/mediatek/mt8188/Makefile.inc b/src/soc/mediatek/mt8188/Makefile.inc deleted file mode 100644 index 14f7d38e3b..0000000000 --- a/src/soc/mediatek/mt8188/Makefile.inc +++ /dev/null @@ -1,96 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ifeq ($(CONFIG_SOC_MEDIATEK_MT8188),y) - -all-y += ../common/flash_controller.c -all-y += ../common/gpio.c ../common/gpio_op.c gpio.c -all-y += ../common/i2c.c i2c.c -all-y += ../common/pll.c pll.c -all-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c -all-y += timer.c ../common/timer_prepare.c -all-y += ../common/uart.c - -bootblock-y += ../common/bootblock.c bootblock.c -bootblock-y += ../common/eint_event.c -bootblock-y += ../common/lastbus_v2.c lastbus.c -bootblock-y += ../common/mmu_operations.c -bootblock-y += ../common/tracker.c ../common/tracker_v2.c -bootblock-y += ../common/wdt.c ../common/wdt_req.c wdt.c - -romstage-y += ../common/cbmem.c -romstage-y += ../common/clkbuf.c -romstage-y += ../common/dram_init.c -romstage-y += ../common/dramc_param.c -romstage-y += ../common/emi.c -romstage-y += ../common/memory.c -romstage-y += ../common/memory_test.c -romstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c -romstage-y += ../common/mt6315.c mt6315.c -romstage-y += ../common/mt6359p.c mt6359p.c -romstage-y += ../common/pmif.c ../common/pmif_clk.c pmif_clk.c -romstage-y += ../common/pmif_spi.c pmif_spi.c -romstage-y += ../common/pmif_spmi.c pmif_spmi.c -romstage-y += ../common/rtc.c ../common/rtc_osc_init.c ../common/rtc_mt6359p.c - -ramstage-y += ../common/auxadc.c -ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += ../common/bl31.c -ramstage-y += cpu_input_gating.c -ramstage-y += ../common/ddp.c ddp.c -ramstage-y += ../common/devapc.c devapc.c -ramstage-y += ../common/dfd.c -ramstage-y += ../common/display.c -ramstage-y += ../common/dp/dp_intf.c ../common/dp/dptx.c ../common/dp/dptx_hal.c dp_intf.c -ramstage-y += ../common/dpm.c -ramstage-$(CONFIG_DPM_FOUR_CHANNEL) += ../common/dpm_4ch.c -ramstage-y += ../common/dsi.c ../common/mtk_mipi_dphy.c -ramstage-y += ../common/emi.c -ramstage-y += ../common/mcu.c -ramstage-y += ../common/mcupm.c -ramstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c -ramstage-$(CONFIG_COMMONLIB_STORAGE_MMC) += ../common/msdc.c msdc.c -ramstage-y += ../common/mt6359p.c mt6359p.c -ramstage-y += ../common/mtcmos.c mtcmos.c -ramstage-y += ../common/pmif.c ../common/pmif_clk.c pmif_clk.c -ramstage-y += ../common/pmif_spi.c pmif_spi.c -ramstage-y += ../common/pmif_spmi.c pmif_spmi.c -ramstage-y += ../common/rtc.c ../common/rtc_osc_init.c ../common/rtc_mt6359p.c -ramstage-y += soc.c -ramstage-y += ../common/spm.c spm.c -ramstage-y += ../common/sspm.c -ramstage-y += ../common/tps65132s.c -ramstage-y += ../common/usb.c usb.c - -BL31_MAKEARGS += PLAT=mt8188 SPD=opteed -BL31_MAKEARGS += OPTEE_ALLOW_SMC_LOAD=1 PLAT_XLAT_TABLES_DYNAMIC=1 - -CPPFLAGS_common += -Isrc/soc/mediatek/mt8188/include -CPPFLAGS_common += -Isrc/soc/mediatek/common/dp/include -CPPFLAGS_common += -Isrc/soc/mediatek/common/include - -MT8188_BLOB_DIR := 3rdparty/blobs/soc/mediatek/mt8188 - -mcu-firmware-files := \ - $(CONFIG_DPM_DM_FIRMWARE) \ - $(CONFIG_DPM_PM_FIRMWARE) \ - $(CONFIG_MCUPM_FIRMWARE) \ - $(CONFIG_SPM_FIRMWARE) \ - $(CONFIG_SSPM_FIRMWARE) - -$(foreach fw, $(call strip_quotes,$(mcu-firmware-files)), \ - $(eval $(fw)-file := $(MT8188_BLOB_DIR)/$(fw)) \ - $(eval $(fw)-type := raw) \ - $(eval $(fw)-compression := LZ4) \ - $(if $(wildcard $($(fw)-file)), $(eval cbfs-files-y += $(fw)), ) \ -) - -DRAM_CBFS := $(CONFIG_CBFS_PREFIX)/dram -$(DRAM_CBFS)-file := $(MT8188_BLOB_DIR)/dram.elf -$(DRAM_CBFS)-type := stage -$(DRAM_CBFS)-compression := $(CBFS_PRERAM_COMPRESS_FLAG) -ifneq ($(wildcard $($(DRAM_CBFS)-file)),) - cbfs-files-y += $(DRAM_CBFS) -endif - -$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin - ./util/mtkheader/gen-bl-img.py mt8183 sf $< $@ - -endif diff --git a/src/soc/mediatek/mt8188/Makefile.mk b/src/soc/mediatek/mt8188/Makefile.mk new file mode 100644 index 0000000000..14f7d38e3b --- /dev/null +++ b/src/soc/mediatek/mt8188/Makefile.mk @@ -0,0 +1,96 @@ +## SPDX-License-Identifier: GPL-2.0-only +ifeq ($(CONFIG_SOC_MEDIATEK_MT8188),y) + +all-y += ../common/flash_controller.c +all-y += ../common/gpio.c ../common/gpio_op.c gpio.c +all-y += ../common/i2c.c i2c.c +all-y += ../common/pll.c pll.c +all-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c +all-y += timer.c ../common/timer_prepare.c +all-y += ../common/uart.c + +bootblock-y += ../common/bootblock.c bootblock.c +bootblock-y += ../common/eint_event.c +bootblock-y += ../common/lastbus_v2.c lastbus.c +bootblock-y += ../common/mmu_operations.c +bootblock-y += ../common/tracker.c ../common/tracker_v2.c +bootblock-y += ../common/wdt.c ../common/wdt_req.c wdt.c + +romstage-y += ../common/cbmem.c +romstage-y += ../common/clkbuf.c +romstage-y += ../common/dram_init.c +romstage-y += ../common/dramc_param.c +romstage-y += ../common/emi.c +romstage-y += ../common/memory.c +romstage-y += ../common/memory_test.c +romstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c +romstage-y += ../common/mt6315.c mt6315.c +romstage-y += ../common/mt6359p.c mt6359p.c +romstage-y += ../common/pmif.c ../common/pmif_clk.c pmif_clk.c +romstage-y += ../common/pmif_spi.c pmif_spi.c +romstage-y += ../common/pmif_spmi.c pmif_spmi.c +romstage-y += ../common/rtc.c ../common/rtc_osc_init.c ../common/rtc_mt6359p.c + +ramstage-y += ../common/auxadc.c +ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += ../common/bl31.c +ramstage-y += cpu_input_gating.c +ramstage-y += ../common/ddp.c ddp.c +ramstage-y += ../common/devapc.c devapc.c +ramstage-y += ../common/dfd.c +ramstage-y += ../common/display.c +ramstage-y += ../common/dp/dp_intf.c ../common/dp/dptx.c ../common/dp/dptx_hal.c dp_intf.c +ramstage-y += ../common/dpm.c +ramstage-$(CONFIG_DPM_FOUR_CHANNEL) += ../common/dpm_4ch.c +ramstage-y += ../common/dsi.c ../common/mtk_mipi_dphy.c +ramstage-y += ../common/emi.c +ramstage-y += ../common/mcu.c +ramstage-y += ../common/mcupm.c +ramstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c +ramstage-$(CONFIG_COMMONLIB_STORAGE_MMC) += ../common/msdc.c msdc.c +ramstage-y += ../common/mt6359p.c mt6359p.c +ramstage-y += ../common/mtcmos.c mtcmos.c +ramstage-y += ../common/pmif.c ../common/pmif_clk.c pmif_clk.c +ramstage-y += ../common/pmif_spi.c pmif_spi.c +ramstage-y += ../common/pmif_spmi.c pmif_spmi.c +ramstage-y += ../common/rtc.c ../common/rtc_osc_init.c ../common/rtc_mt6359p.c +ramstage-y += soc.c +ramstage-y += ../common/spm.c spm.c +ramstage-y += ../common/sspm.c +ramstage-y += ../common/tps65132s.c +ramstage-y += ../common/usb.c usb.c + +BL31_MAKEARGS += PLAT=mt8188 SPD=opteed +BL31_MAKEARGS += OPTEE_ALLOW_SMC_LOAD=1 PLAT_XLAT_TABLES_DYNAMIC=1 + +CPPFLAGS_common += -Isrc/soc/mediatek/mt8188/include +CPPFLAGS_common += -Isrc/soc/mediatek/common/dp/include +CPPFLAGS_common += -Isrc/soc/mediatek/common/include + +MT8188_BLOB_DIR := 3rdparty/blobs/soc/mediatek/mt8188 + +mcu-firmware-files := \ + $(CONFIG_DPM_DM_FIRMWARE) \ + $(CONFIG_DPM_PM_FIRMWARE) \ + $(CONFIG_MCUPM_FIRMWARE) \ + $(CONFIG_SPM_FIRMWARE) \ + $(CONFIG_SSPM_FIRMWARE) + +$(foreach fw, $(call strip_quotes,$(mcu-firmware-files)), \ + $(eval $(fw)-file := $(MT8188_BLOB_DIR)/$(fw)) \ + $(eval $(fw)-type := raw) \ + $(eval $(fw)-compression := LZ4) \ + $(if $(wildcard $($(fw)-file)), $(eval cbfs-files-y += $(fw)), ) \ +) + +DRAM_CBFS := $(CONFIG_CBFS_PREFIX)/dram +$(DRAM_CBFS)-file := $(MT8188_BLOB_DIR)/dram.elf +$(DRAM_CBFS)-type := stage +$(DRAM_CBFS)-compression := $(CBFS_PRERAM_COMPRESS_FLAG) +ifneq ($(wildcard $($(DRAM_CBFS)-file)),) + cbfs-files-y += $(DRAM_CBFS) +endif + +$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin + ./util/mtkheader/gen-bl-img.py mt8183 sf $< $@ + +endif diff --git a/src/soc/mediatek/mt8192/Makefile.inc b/src/soc/mediatek/mt8192/Makefile.inc deleted file mode 100644 index 5d4b87b51e..0000000000 --- a/src/soc/mediatek/mt8192/Makefile.inc +++ /dev/null @@ -1,88 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ifeq ($(CONFIG_SOC_MEDIATEK_MT8192),y) - -# for bootblock, verstage, romstage, ramstage -all-y += ../common/flash_controller.c -all-y += ../common/gpio.c ../common/gpio_op.c gpio.c -all-y += ../common/i2c.c i2c.c -all-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c -all-y += ../common/timer.c -all-y += ../common/uart.c - -bootblock-y += bootblock.c -bootblock-y += ../common/eint_event.c -bootblock-y += ../common/mmu_operations.c -bootblock-y += ../common/pll.c pll.c -bootblock-y += ../common/tracker.c ../common/tracker_v2.c -bootblock-y += ../common/wdt.c ../common/wdt_req.c - -romstage-y += ../common/auxadc.c -romstage-y += ../common/cbmem.c -romstage-y += ../common/clkbuf.c srclken_rc.c -romstage-y += ../common/dram_init.c -romstage-y += ../common/dramc_param.c -romstage-y += ../common/memory.c ../common/memory_test.c -romstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c -romstage-y += ../common/pll.c pll.c -romstage-y += ../common/pmif.c ../common/pmif_clk.c pmif_clk.c -romstage-y += ../common/pmif_spi.c pmif_spi.c -romstage-y += ../common/pmif_spmi.c pmif_spmi.c -romstage-y += ../common/mt6315.c mt6315.c -romstage-y += ../common/mt6359p.c mt6359p.c -romstage-y += ../common/rtc.c ../common/rtc_osc_init.c ../common/rtc_mt6359p.c - -ramstage-y += apusys.c -ramstage-y += ../common/auxadc.c -ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += ../common/bl31.c -ramstage-y += ../common/ddp.c ddp.c -ramstage-y += devapc.c -ramstage-y += ../common/dfd.c -ramstage-y += ../common/dpm.c -ramstage-y += ../common/dsi.c ../common/mtk_mipi_dphy.c -ramstage-y += ../common/mcu.c -ramstage-y += ../common/mcupm.c -ramstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c -ramstage-$(CONFIG_COMMONLIB_STORAGE_MMC) += ../common/msdc.c msdc.c -ramstage-y += ../common/mtcmos.c mtcmos.c -ramstage-y += ../common/pmif.c -ramstage-y += ../common/rtc.c ../common/rtc_mt6359p.c -ramstage-y += soc.c -ramstage-y += ../common/spm.c spm.c -ramstage-y += ../common/sspm.c -ramstage-y += ../common/ufs.c -ramstage-y += ../common/usb.c usb.c - -CPPFLAGS_common += -Isrc/soc/mediatek/mt8192/include -CPPFLAGS_common += -Isrc/soc/mediatek/common/include -CPPFLAGS_common += -Isrc/vendorcode/mediatek/mt8192/include - -BL31_MAKEARGS += PLAT=mt8192 - -MT8192_BLOB_DIR := 3rdparty/blobs/soc/mediatek/mt8192 - -mcu-firmware-files := \ - $(CONFIG_DPM_DM_FIRMWARE) \ - $(CONFIG_DPM_PM_FIRMWARE) \ - $(CONFIG_MCUPM_FIRMWARE) \ - $(CONFIG_SSPM_FIRMWARE) \ - $(CONFIG_SPM_FIRMWARE) - -$(foreach fw, $(call strip_quotes,$(mcu-firmware-files)), \ - $(eval $(fw)-file := $(MT8192_BLOB_DIR)/$(fw)) \ - $(eval $(fw)-type := raw) \ - $(eval $(fw)-compression := LZ4) \ - $(if $(wildcard $($(fw)-file)), $(eval cbfs-files-y += $(fw)), ) \ -) - -DRAM_CBFS := $(CONFIG_CBFS_PREFIX)/dram -$(DRAM_CBFS)-file := $(MT8192_BLOB_DIR)/dram.elf -$(DRAM_CBFS)-type := stage -$(DRAM_CBFS)-compression := $(CBFS_PRERAM_COMPRESS_FLAG) -ifneq ($(wildcard $($(DRAM_CBFS)-file)),) - cbfs-files-y += $(DRAM_CBFS) -endif - -$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin - ./util/mtkheader/gen-bl-img.py mt8183 sf $< $@ - -endif diff --git a/src/soc/mediatek/mt8192/Makefile.mk b/src/soc/mediatek/mt8192/Makefile.mk new file mode 100644 index 0000000000..5d4b87b51e --- /dev/null +++ b/src/soc/mediatek/mt8192/Makefile.mk @@ -0,0 +1,88 @@ +## SPDX-License-Identifier: GPL-2.0-only +ifeq ($(CONFIG_SOC_MEDIATEK_MT8192),y) + +# for bootblock, verstage, romstage, ramstage +all-y += ../common/flash_controller.c +all-y += ../common/gpio.c ../common/gpio_op.c gpio.c +all-y += ../common/i2c.c i2c.c +all-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c +all-y += ../common/timer.c +all-y += ../common/uart.c + +bootblock-y += bootblock.c +bootblock-y += ../common/eint_event.c +bootblock-y += ../common/mmu_operations.c +bootblock-y += ../common/pll.c pll.c +bootblock-y += ../common/tracker.c ../common/tracker_v2.c +bootblock-y += ../common/wdt.c ../common/wdt_req.c + +romstage-y += ../common/auxadc.c +romstage-y += ../common/cbmem.c +romstage-y += ../common/clkbuf.c srclken_rc.c +romstage-y += ../common/dram_init.c +romstage-y += ../common/dramc_param.c +romstage-y += ../common/memory.c ../common/memory_test.c +romstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c +romstage-y += ../common/pll.c pll.c +romstage-y += ../common/pmif.c ../common/pmif_clk.c pmif_clk.c +romstage-y += ../common/pmif_spi.c pmif_spi.c +romstage-y += ../common/pmif_spmi.c pmif_spmi.c +romstage-y += ../common/mt6315.c mt6315.c +romstage-y += ../common/mt6359p.c mt6359p.c +romstage-y += ../common/rtc.c ../common/rtc_osc_init.c ../common/rtc_mt6359p.c + +ramstage-y += apusys.c +ramstage-y += ../common/auxadc.c +ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += ../common/bl31.c +ramstage-y += ../common/ddp.c ddp.c +ramstage-y += devapc.c +ramstage-y += ../common/dfd.c +ramstage-y += ../common/dpm.c +ramstage-y += ../common/dsi.c ../common/mtk_mipi_dphy.c +ramstage-y += ../common/mcu.c +ramstage-y += ../common/mcupm.c +ramstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c +ramstage-$(CONFIG_COMMONLIB_STORAGE_MMC) += ../common/msdc.c msdc.c +ramstage-y += ../common/mtcmos.c mtcmos.c +ramstage-y += ../common/pmif.c +ramstage-y += ../common/rtc.c ../common/rtc_mt6359p.c +ramstage-y += soc.c +ramstage-y += ../common/spm.c spm.c +ramstage-y += ../common/sspm.c +ramstage-y += ../common/ufs.c +ramstage-y += ../common/usb.c usb.c + +CPPFLAGS_common += -Isrc/soc/mediatek/mt8192/include +CPPFLAGS_common += -Isrc/soc/mediatek/common/include +CPPFLAGS_common += -Isrc/vendorcode/mediatek/mt8192/include + +BL31_MAKEARGS += PLAT=mt8192 + +MT8192_BLOB_DIR := 3rdparty/blobs/soc/mediatek/mt8192 + +mcu-firmware-files := \ + $(CONFIG_DPM_DM_FIRMWARE) \ + $(CONFIG_DPM_PM_FIRMWARE) \ + $(CONFIG_MCUPM_FIRMWARE) \ + $(CONFIG_SSPM_FIRMWARE) \ + $(CONFIG_SPM_FIRMWARE) + +$(foreach fw, $(call strip_quotes,$(mcu-firmware-files)), \ + $(eval $(fw)-file := $(MT8192_BLOB_DIR)/$(fw)) \ + $(eval $(fw)-type := raw) \ + $(eval $(fw)-compression := LZ4) \ + $(if $(wildcard $($(fw)-file)), $(eval cbfs-files-y += $(fw)), ) \ +) + +DRAM_CBFS := $(CONFIG_CBFS_PREFIX)/dram +$(DRAM_CBFS)-file := $(MT8192_BLOB_DIR)/dram.elf +$(DRAM_CBFS)-type := stage +$(DRAM_CBFS)-compression := $(CBFS_PRERAM_COMPRESS_FLAG) +ifneq ($(wildcard $($(DRAM_CBFS)-file)),) + cbfs-files-y += $(DRAM_CBFS) +endif + +$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin + ./util/mtkheader/gen-bl-img.py mt8183 sf $< $@ + +endif diff --git a/src/soc/mediatek/mt8195/Makefile.inc b/src/soc/mediatek/mt8195/Makefile.inc deleted file mode 100644 index 56a10bc2f2..0000000000 --- a/src/soc/mediatek/mt8195/Makefile.inc +++ /dev/null @@ -1,104 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ifeq ($(CONFIG_SOC_MEDIATEK_MT8195),y) - -# for bootblock, verstage, romstage, ramstage -all-y += ../common/flash_controller.c -all-y += ../common/gpio.c ../common/gpio_op.c gpio.c -all-y += ../common/i2c.c i2c.c -all-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c -all-y += ../common/timer.c ../common/timer_prepare.c -all-y += ../common/uart.c - -bootblock-y += bootblock.c -bootblock-y += ../common/early_init.c -bootblock-y += ../common/eint_event.c -bootblock-y += ../common/mmu_operations.c -bootblock-$(CONFIG_PCI) += pcie.c -bootblock-y += ../common/pll.c pll.c -bootblock-y += ../common/tracker.c ../common/tracker_v2.c -bootblock-y += ../common/wdt.c ../common/wdt_req.c wdt.c - -romstage-y += ../common/cbmem.c -romstage-y += ../common/clkbuf.c -romstage-y += ../common/dram_init.c -romstage-y += ../common/dramc_param.c -romstage-y += emi.c -romstage-y += ../common/memory.c -romstage-y += ../common/memory_test.c -romstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c -romstage-y += ../common/pll.c pll.c -romstage-y += scp.c -romstage-y += ../common/pmif.c ../common/pmif_clk.c pmif_clk.c -romstage-y += ../common/pmif_spi.c pmif_spi.c -romstage-y += ../common/pmif_spmi.c pmif_spmi.c -romstage-y += ../common/mt6315.c mt6315.c -romstage-y += ../common/mt6359p.c mt6359p.c -romstage-y += mt6360.c -romstage-y += mt6691.c -romstage-y += ../common/rtc.c ../common/rtc_osc_init.c ../common/rtc_mt6359p.c - -ramstage-y += apusys.c -ramstage-y += apusys_devapc.c -ramstage-y += ../common/auxadc.c -ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += ../common/bl31.c -ramstage-y += ../common/early_init.c -ramstage-y += ../common/ddp.c ddp.c -ramstage-y += ../common/devapc.c devapc.c -ramstage-y += ../common/dfd.c -ramstage-y += ../common/display.c -ramstage-y += ../common/dpm.c -ramstage-$(CONFIG_DPM_FOUR_CHANNEL) += ../common/dpm_4ch.c -ramstage-y += ../common/dp/dp_intf.c ../common/dp/dptx.c ../common/dp/dptx_hal.c dp_intf.c -ramstage-y += emi.c -ramstage-y += hdmi.c -ramstage-y += ../common/mcu.c -ramstage-y += ../common/mcupm.c -ramstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c -ramstage-$(CONFIG_COMMONLIB_STORAGE_MMC) += ../common/msdc.c msdc.c -ramstage-y += mt6360.c -ramstage-y += ../common/mtcmos.c mtcmos.c -ramstage-$(CONFIG_PCI) += ../common/pcie.c pcie.c -ramstage-y += ../common/pll.c pll.c -ramstage-y += ../common/pmif.c -ramstage-y += ../common/rtc.c ../common/rtc_mt6359p.c -ramstage-y += soc.c -ramstage-y += ../common/spm.c spm.c -ramstage-y += ../common/sspm.c -ramstage-y += ../common/ufs.c -ramstage-y += ../common/usb.c usb.c - -CPPFLAGS_common += -Isrc/soc/mediatek/mt8195/include -CPPFLAGS_common += -Isrc/soc/mediatek/common/dp/include -CPPFLAGS_common += -Isrc/soc/mediatek/common/include -CPPFLAGS_common += -Isrc/vendorcode/mediatek/mt8195/include - -BL31_MAKEARGS += PLAT=mt8195 - -MT8195_BLOB_DIR := 3rdparty/blobs/soc/mediatek/mt8195 - -mcu-firmware-files := \ - $(CONFIG_DPM_DM_FIRMWARE) \ - $(CONFIG_DPM_PM_FIRMWARE) \ - $(CONFIG_MCUPM_FIRMWARE) \ - $(CONFIG_SSPM_FIRMWARE) \ - $(CONFIG_SPM_FIRMWARE) - -$(foreach fw, $(call strip_quotes,$(mcu-firmware-files)), \ - $(eval $(fw)-file := $(MT8195_BLOB_DIR)/$(fw)) \ - $(eval $(fw)-type := raw) \ - $(eval $(fw)-compression := LZ4) \ - $(if $(wildcard $($(fw)-file)), $(eval cbfs-files-y += $(fw)), ) \ -) - -DRAM_CBFS := $(CONFIG_CBFS_PREFIX)/dram -$(DRAM_CBFS)-file := $(MT8195_BLOB_DIR)/dram.elf -$(DRAM_CBFS)-type := stage -$(DRAM_CBFS)-compression := $(CBFS_PRERAM_COMPRESS_FLAG) -ifneq ($(wildcard $($(DRAM_CBFS)-file)),) - cbfs-files-y += $(DRAM_CBFS) -endif - -$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin - ./util/mtkheader/gen-bl-img.py mt8183 sf $< $@ - -endif diff --git a/src/soc/mediatek/mt8195/Makefile.mk b/src/soc/mediatek/mt8195/Makefile.mk new file mode 100644 index 0000000000..56a10bc2f2 --- /dev/null +++ b/src/soc/mediatek/mt8195/Makefile.mk @@ -0,0 +1,104 @@ +## SPDX-License-Identifier: GPL-2.0-only +ifeq ($(CONFIG_SOC_MEDIATEK_MT8195),y) + +# for bootblock, verstage, romstage, ramstage +all-y += ../common/flash_controller.c +all-y += ../common/gpio.c ../common/gpio_op.c gpio.c +all-y += ../common/i2c.c i2c.c +all-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c +all-y += ../common/timer.c ../common/timer_prepare.c +all-y += ../common/uart.c + +bootblock-y += bootblock.c +bootblock-y += ../common/early_init.c +bootblock-y += ../common/eint_event.c +bootblock-y += ../common/mmu_operations.c +bootblock-$(CONFIG_PCI) += pcie.c +bootblock-y += ../common/pll.c pll.c +bootblock-y += ../common/tracker.c ../common/tracker_v2.c +bootblock-y += ../common/wdt.c ../common/wdt_req.c wdt.c + +romstage-y += ../common/cbmem.c +romstage-y += ../common/clkbuf.c +romstage-y += ../common/dram_init.c +romstage-y += ../common/dramc_param.c +romstage-y += emi.c +romstage-y += ../common/memory.c +romstage-y += ../common/memory_test.c +romstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c +romstage-y += ../common/pll.c pll.c +romstage-y += scp.c +romstage-y += ../common/pmif.c ../common/pmif_clk.c pmif_clk.c +romstage-y += ../common/pmif_spi.c pmif_spi.c +romstage-y += ../common/pmif_spmi.c pmif_spmi.c +romstage-y += ../common/mt6315.c mt6315.c +romstage-y += ../common/mt6359p.c mt6359p.c +romstage-y += mt6360.c +romstage-y += mt6691.c +romstage-y += ../common/rtc.c ../common/rtc_osc_init.c ../common/rtc_mt6359p.c + +ramstage-y += apusys.c +ramstage-y += apusys_devapc.c +ramstage-y += ../common/auxadc.c +ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += ../common/bl31.c +ramstage-y += ../common/early_init.c +ramstage-y += ../common/ddp.c ddp.c +ramstage-y += ../common/devapc.c devapc.c +ramstage-y += ../common/dfd.c +ramstage-y += ../common/display.c +ramstage-y += ../common/dpm.c +ramstage-$(CONFIG_DPM_FOUR_CHANNEL) += ../common/dpm_4ch.c +ramstage-y += ../common/dp/dp_intf.c ../common/dp/dptx.c ../common/dp/dptx_hal.c dp_intf.c +ramstage-y += emi.c +ramstage-y += hdmi.c +ramstage-y += ../common/mcu.c +ramstage-y += ../common/mcupm.c +ramstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c +ramstage-$(CONFIG_COMMONLIB_STORAGE_MMC) += ../common/msdc.c msdc.c +ramstage-y += mt6360.c +ramstage-y += ../common/mtcmos.c mtcmos.c +ramstage-$(CONFIG_PCI) += ../common/pcie.c pcie.c +ramstage-y += ../common/pll.c pll.c +ramstage-y += ../common/pmif.c +ramstage-y += ../common/rtc.c ../common/rtc_mt6359p.c +ramstage-y += soc.c +ramstage-y += ../common/spm.c spm.c +ramstage-y += ../common/sspm.c +ramstage-y += ../common/ufs.c +ramstage-y += ../common/usb.c usb.c + +CPPFLAGS_common += -Isrc/soc/mediatek/mt8195/include +CPPFLAGS_common += -Isrc/soc/mediatek/common/dp/include +CPPFLAGS_common += -Isrc/soc/mediatek/common/include +CPPFLAGS_common += -Isrc/vendorcode/mediatek/mt8195/include + +BL31_MAKEARGS += PLAT=mt8195 + +MT8195_BLOB_DIR := 3rdparty/blobs/soc/mediatek/mt8195 + +mcu-firmware-files := \ + $(CONFIG_DPM_DM_FIRMWARE) \ + $(CONFIG_DPM_PM_FIRMWARE) \ + $(CONFIG_MCUPM_FIRMWARE) \ + $(CONFIG_SSPM_FIRMWARE) \ + $(CONFIG_SPM_FIRMWARE) + +$(foreach fw, $(call strip_quotes,$(mcu-firmware-files)), \ + $(eval $(fw)-file := $(MT8195_BLOB_DIR)/$(fw)) \ + $(eval $(fw)-type := raw) \ + $(eval $(fw)-compression := LZ4) \ + $(if $(wildcard $($(fw)-file)), $(eval cbfs-files-y += $(fw)), ) \ +) + +DRAM_CBFS := $(CONFIG_CBFS_PREFIX)/dram +$(DRAM_CBFS)-file := $(MT8195_BLOB_DIR)/dram.elf +$(DRAM_CBFS)-type := stage +$(DRAM_CBFS)-compression := $(CBFS_PRERAM_COMPRESS_FLAG) +ifneq ($(wildcard $($(DRAM_CBFS)-file)),) + cbfs-files-y += $(DRAM_CBFS) +endif + +$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin + ./util/mtkheader/gen-bl-img.py mt8183 sf $< $@ + +endif diff --git a/src/soc/nvidia/tegra124/Makefile.inc b/src/soc/nvidia/tegra124/Makefile.inc deleted file mode 100644 index fb8c160fae..0000000000 --- a/src/soc/nvidia/tegra124/Makefile.inc +++ /dev/null @@ -1,98 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ifeq ($(CONFIG_SOC_NVIDIA_TEGRA124),y) - -bootblock-y += bootblock.c -bootblock-y += bootblock_asm.S -bootblock-y += clock.c -bootblock-y += dma.c -bootblock-y += i2c.c -bootblock-y += dma.c -bootblock-y += maincpu.S -bootblock-y += monotonic_timer.c -bootblock-y += power.c -bootblock-y += spi.c -bootblock-y += ../tegra/gpio.c -bootblock-y += ../tegra/i2c.c -bootblock-$(CONFIG_SOFTWARE_I2C) += ../tegra/software_i2c.c -bootblock-y += ../tegra/pingroup.c -bootblock-y += ../tegra/pinmux.c -bootblock-y += ../tegra/apbmisc.c -bootblock-y += uart.c - -verstage-y += verstage.c -verstage-y += dma.c -verstage-y += monotonic_timer.c -verstage-y += spi.c -verstage-y += uart.c -verstage-y += ../tegra/gpio.c -verstage-y += ../tegra/i2c.c -verstage-y += ../tegra/pinmux.c -verstage-y += clock.c -verstage-y += i2c.c -verstage-y += cache.c - -romstage-y += cbmem.c -romstage-y += clock.c -romstage-y += dma.c -romstage-y += i2c.c -romstage-y += monotonic_timer.c -romstage-y += power.c -romstage-y += sdram.c -romstage-y += sdram_lp0.c -romstage-y += spi.c -romstage-y += ../tegra/gpio.c -romstage-y += ../tegra/i2c.c -romstage-$(CONFIG_SOFTWARE_I2C) += ../tegra/software_i2c.c -romstage-y += ../tegra/pinmux.c -romstage-y += cache.c -romstage-y += uart.c - -ramstage-y += clock.c -ramstage-y += display.c -ramstage-y += dma.c -ramstage-y += i2c.c -ramstage-y += maincpu.S -ramstage-y += monotonic_timer.c -ramstage-y += sdram.c -ramstage-y += soc.c -ramstage-y += sor.c -ramstage-y += spi.c -ramstage-y += dp.c -ramstage-y += ../tegra/gpio.c -ramstage-y += ../tegra/i2c.c -ramstage-$(CONFIG_SOFTWARE_I2C) += ../tegra/software_i2c.c -ramstage-y += ../tegra/pinmux.c -ramstage-y += ../tegra/usb.c -ramstage-y += uart.c - -rmodules_$(ARCH-romstage-y)-y += monotonic_timer.c - -CPPFLAGS_common += -Isrc/soc/nvidia/tegra124/include/ - -# We want to grab the bootblock right before it goes into the image and wrap -# it inside a BCT, but ideally we would do that without making special, one -# use modifications to the main ARM Makefile. We do this in two ways. First, -# we copy bootblock.elf to bootblock.raw.elf and allow the %.bin: %.elf -# template rule to turn it into bootblock.raw.bin. This makes sure whatever -# processing is supposed to happen to turn an .elf into a .bin happens. -# -# Second, we add our own rule for creating bootblock.bin from -# bootblock.raw.bin which displaces the template rule. When other rules that -# package up the image pull in bootblock.bin, it will be this wrapped version -# instead of the raw bootblock. - -$(obj)/generated/bct.bin: $(obj)/generated/bct.cfg $(CBOOTIMAGE) - @printf " CBOOTIMAGE $(subst $(obj)/,,$(@))\n" - $(CBOOTIMAGE) -gbct --soc tegra124 $< $@ - -BCT_BIN = $(obj)/generated/bct.bin -BCT_WRAPPER = $(obj)/generated/bct.wrapper -$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin $(BCT_BIN) $(CBOOTIMAGE) - echo "Version = 1;" > $(BCT_WRAPPER) - echo "Redundancy = 1;" >> $(BCT_WRAPPER) - echo "Bctfile = $(BCT_BIN);" >> $(BCT_WRAPPER) - echo "BootLoader = $<,$(call loadaddr,bootblock),$(call loadaddr,bootblock),Complete;" >> $(BCT_WRAPPER) - @printf " CBOOTIMAGE $(subst $(obj)/,,$(@))\n" - $(CBOOTIMAGE) $(BCT_WRAPPER) $@ - -endif diff --git a/src/soc/nvidia/tegra124/Makefile.mk b/src/soc/nvidia/tegra124/Makefile.mk new file mode 100644 index 0000000000..fb8c160fae --- /dev/null +++ b/src/soc/nvidia/tegra124/Makefile.mk @@ -0,0 +1,98 @@ +## SPDX-License-Identifier: GPL-2.0-only +ifeq ($(CONFIG_SOC_NVIDIA_TEGRA124),y) + +bootblock-y += bootblock.c +bootblock-y += bootblock_asm.S +bootblock-y += clock.c +bootblock-y += dma.c +bootblock-y += i2c.c +bootblock-y += dma.c +bootblock-y += maincpu.S +bootblock-y += monotonic_timer.c +bootblock-y += power.c +bootblock-y += spi.c +bootblock-y += ../tegra/gpio.c +bootblock-y += ../tegra/i2c.c +bootblock-$(CONFIG_SOFTWARE_I2C) += ../tegra/software_i2c.c +bootblock-y += ../tegra/pingroup.c +bootblock-y += ../tegra/pinmux.c +bootblock-y += ../tegra/apbmisc.c +bootblock-y += uart.c + +verstage-y += verstage.c +verstage-y += dma.c +verstage-y += monotonic_timer.c +verstage-y += spi.c +verstage-y += uart.c +verstage-y += ../tegra/gpio.c +verstage-y += ../tegra/i2c.c +verstage-y += ../tegra/pinmux.c +verstage-y += clock.c +verstage-y += i2c.c +verstage-y += cache.c + +romstage-y += cbmem.c +romstage-y += clock.c +romstage-y += dma.c +romstage-y += i2c.c +romstage-y += monotonic_timer.c +romstage-y += power.c +romstage-y += sdram.c +romstage-y += sdram_lp0.c +romstage-y += spi.c +romstage-y += ../tegra/gpio.c +romstage-y += ../tegra/i2c.c +romstage-$(CONFIG_SOFTWARE_I2C) += ../tegra/software_i2c.c +romstage-y += ../tegra/pinmux.c +romstage-y += cache.c +romstage-y += uart.c + +ramstage-y += clock.c +ramstage-y += display.c +ramstage-y += dma.c +ramstage-y += i2c.c +ramstage-y += maincpu.S +ramstage-y += monotonic_timer.c +ramstage-y += sdram.c +ramstage-y += soc.c +ramstage-y += sor.c +ramstage-y += spi.c +ramstage-y += dp.c +ramstage-y += ../tegra/gpio.c +ramstage-y += ../tegra/i2c.c +ramstage-$(CONFIG_SOFTWARE_I2C) += ../tegra/software_i2c.c +ramstage-y += ../tegra/pinmux.c +ramstage-y += ../tegra/usb.c +ramstage-y += uart.c + +rmodules_$(ARCH-romstage-y)-y += monotonic_timer.c + +CPPFLAGS_common += -Isrc/soc/nvidia/tegra124/include/ + +# We want to grab the bootblock right before it goes into the image and wrap +# it inside a BCT, but ideally we would do that without making special, one +# use modifications to the main ARM Makefile. We do this in two ways. First, +# we copy bootblock.elf to bootblock.raw.elf and allow the %.bin: %.elf +# template rule to turn it into bootblock.raw.bin. This makes sure whatever +# processing is supposed to happen to turn an .elf into a .bin happens. +# +# Second, we add our own rule for creating bootblock.bin from +# bootblock.raw.bin which displaces the template rule. When other rules that +# package up the image pull in bootblock.bin, it will be this wrapped version +# instead of the raw bootblock. + +$(obj)/generated/bct.bin: $(obj)/generated/bct.cfg $(CBOOTIMAGE) + @printf " CBOOTIMAGE $(subst $(obj)/,,$(@))\n" + $(CBOOTIMAGE) -gbct --soc tegra124 $< $@ + +BCT_BIN = $(obj)/generated/bct.bin +BCT_WRAPPER = $(obj)/generated/bct.wrapper +$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin $(BCT_BIN) $(CBOOTIMAGE) + echo "Version = 1;" > $(BCT_WRAPPER) + echo "Redundancy = 1;" >> $(BCT_WRAPPER) + echo "Bctfile = $(BCT_BIN);" >> $(BCT_WRAPPER) + echo "BootLoader = $<,$(call loadaddr,bootblock),$(call loadaddr,bootblock),Complete;" >> $(BCT_WRAPPER) + @printf " CBOOTIMAGE $(subst $(obj)/,,$(@))\n" + $(CBOOTIMAGE) $(BCT_WRAPPER) $@ + +endif diff --git a/src/soc/nvidia/tegra210/Makefile.inc b/src/soc/nvidia/tegra210/Makefile.inc deleted file mode 100644 index d93f0488c5..0000000000 --- a/src/soc/nvidia/tegra210/Makefile.inc +++ /dev/null @@ -1,161 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ifeq ($(CONFIG_SOC_NVIDIA_TEGRA210),y) - -CBOOTIMAGE_OPTS = --soc tegra210 - -bootblock-y += bootblock.c -bootblock-y += bootblock_asm.S -bootblock-y += clock.c -bootblock-y += spi.c -bootblock-y += i2c.c -bootblock-y += dma.c -bootblock-y += monotonic_timer.c -bootblock-y += padconfig.c -bootblock-y += power.c -bootblock-y += funitcfg.c -bootblock-y += ../tegra/gpio.c -bootblock-y += ../tegra/i2c.c -bootblock-y += ../tegra/pingroup.c -bootblock-y += ../tegra/pinmux.c -bootblock-y += ../tegra/apbmisc.c -bootblock-y += ../tegra/usb.c -bootblock-y += uart.c - -verstage-y += dma.c -verstage-y += monotonic_timer.c -verstage-y += spi.c -verstage-y += padconfig.c -verstage-y += funitcfg.c -verstage-y += uart.c -verstage-y += ../tegra/gpio.c -verstage-y += ../tegra/i2c.c -verstage-y += ../tegra/pinmux.c -verstage-y += clock.c -verstage-y += i2c.c - -romstage-y += romstage_asm.S -romstage-y += addressmap.c -romstage-y += cbmem.c -romstage-y += ccplex.c -romstage-y += clock.c -romstage-y += cpu.c -romstage-y += spi.c -romstage-y += i2c.c -romstage-y += dma.c -romstage-y += monotonic_timer.c -romstage-y += padconfig.c -romstage-y += funitcfg.c -romstage-y += romstage.c -romstage-y += power.c -romstage-y += ram_code.c -ifneq ($(CONFIG_BOOTROM_SDRAM_INIT),y) -romstage-y += sdram.c -romstage-y += sdram_lp0.c -endif -romstage-y += ../tegra/gpio.c -romstage-y += ../tegra/i2c.c -romstage-y += ../tegra/pinmux.c -romstage-y += ../tegra/usb.c -romstage-y += uart.c - -ramstage-y += addressmap.c -ramstage-y += cbmem.c -ramstage-y += cpu.c -ramstage-y += clock.c -ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += dc.c -ramstage-$(CONFIG_MAINBOARD_DO_DSI_INIT) += dsi.c -ramstage-$(CONFIG_MAINBOARD_DO_DSI_INIT) += mipi_dsi.c -ramstage-$(CONFIG_MAINBOARD_DO_DSI_INIT) += mipi.c -ramstage-$(CONFIG_MAINBOARD_DO_DSI_INIT) += mipi-phy.c -ramstage-$(CONFIG_MAINBOARD_DO_DSI_INIT) += ./jdi_25x18_display/panel-jdi-lpm102a188a.c -ramstage-$(CONFIG_MAINBOARD_DO_SOR_INIT) += dp.c -ramstage-$(CONFIG_MAINBOARD_DO_SOR_INIT) += sor.c -ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += arm_tf.c - -ramstage-y += sdram_lp0.c -ramstage-y += soc.c -ramstage-y += spi.c -ramstage-y += i2c.c -ramstage-y += i2c6.c -ramstage-y += ape.c -ramstage-y += power.c -ramstage-y += dma.c -ramstage-y += monotonic_timer.c -ramstage-y += padconfig.c -ramstage-y += funitcfg.c -ramstage-y += ram_code.c -ramstage-y += ../tegra/apbmisc.c -ramstage-y += ../tegra/gpio.c -ramstage-y += ../tegra/i2c.c -ramstage-y += ../tegra/pinmux.c -ramstage-y += ramstage.c -ramstage-y += mmu_operations.c -ramstage-y += uart.c -ramstage-y += ../tegra/usb.c -ramstage-$(CONFIG_HAVE_MTC) += mtc.c -ramstage-y += stage_entry.S - -rmodules_arm-y += monotonic_timer.c - -CPPFLAGS_common += -Isrc/soc/nvidia/tegra210/include/ - -# We want to grab the bootblock right before it goes into the image and wrap -# it inside a BCT, but ideally we would do that without making special, one -# use modifications to the main ARM Makefile. We do this in two ways. First, -# we copy bootblock.elf to bootblock.raw.elf and allow the %.bin: %.elf -# template rule to turn it into bootblock.raw.bin. This makes sure whatever -# processing is supposed to happen to turn an .elf into a .bin happens. -# -# Second, we add our own rule for creating bootblock.bin from -# bootblock.raw.bin which displaces the template rule. When other rules that -# package up the image pull in bootblock.bin, it will be this wrapped version -# instead of the raw bootblock. - -$(objcbfs)/bootblock.raw.elf: $(objcbfs)/bootblock.elf - cp $< $@ - -$(obj)/generated/bct.bin: $(obj)/generated/bct.cfg $(CBOOTIMAGE) - @printf " CBOOTIMAGE $(subst $(obj)/,,$(@))\n" - $(CBOOTIMAGE) -gbct $(CBOOTIMAGE_OPTS) $< $@ - -BCT_BIN = $(obj)/generated/bct.bin -BCT_WRAPPER = $(obj)/generated/bct.wrapper -$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin $(BCT_BIN) - echo "Version = 1;" > $(BCT_WRAPPER) - echo "Redundancy = 1;" >> $(BCT_WRAPPER) - echo "Bctcopy = 1;" >> $(BCT_WRAPPER) - echo "Bctfile = $(BCT_BIN);" >> $(BCT_WRAPPER) - echo "BootLoader = $<,$(call loadaddr,bootblock),$(call loadaddr,bootblock),Complete;" >> $(BCT_WRAPPER) - @printf " CBOOTIMAGE $(subst $(obj)/,,$(@))\n" - $(CBOOTIMAGE) $(CBOOTIMAGE_OPTS) $(BCT_WRAPPER) $@ - -# We need to ensure that TZ memory has enough space to hold TTB and resident EL3 -# components (including BL31 and Secure OS) -ttb_size=$(shell printf "%d" $(CONFIG_TTB_SIZE_MB)) -sec_size=$(shell printf "%d" $(CONFIG_SEC_COMPONENT_SIZE_MB)) -req_tz_size=$(shell expr $(ttb_size) + $(sec_size)) - -tz_size=$(shell printf "%d" $(CONFIG_TRUSTZONE_CARVEOUT_SIZE_MB)) - -ifeq ($(shell test $(tz_size) -lt $(req_tz_size) && echo 1), 1) - $(error "TRUSTZONE_CARVEOUT_SIZE_MB should be at least as big as TTB_SIZE_MB + SEC_COMPONENT_SIZE_MB") -endif - -# BL31 component is placed towards the end of 32-bit address space. This assumes -# that TrustZone memory is placed at the end of 32-bit address space. Within the -# TZ memory, we place BL31 and BL32(if available) towards the beginning and TTB -# towards the end. Calculate TZDRAM_BASE i.e. base of BL31 component by: -# 0x1000 = end of 32-bit address space in MiB -# 0x1000 - $(CONFIG_TRUSTZONE_CARVEOUT_SIZE_MB) = start of TZ memory in MiB -BL31_MAKEARGS += TZDRAM_BASE=$$(((0x1000 - $(CONFIG_TRUSTZONE_CARVEOUT_SIZE_MB)) << 20)) -BL31_MAKEARGS += PLAT=tegra TARGET_SOC=t210 - -# MTC fw -MTC_DIR = $(CONFIG_MTC_DIRECTORY) -MTC_FILE = $(MTC_DIR)/$(CONFIG_MTC_FILE) -MTC_FILE_CBFS = $(CONFIG_MTC_FILE) -cbfs-files-$(CONFIG_HAVE_MTC) += $(MTC_FILE_CBFS) -$(MTC_FILE_CBFS)-file := $(MTC_FILE) -$(MTC_FILE_CBFS)-type := raw - -endif diff --git a/src/soc/nvidia/tegra210/Makefile.mk b/src/soc/nvidia/tegra210/Makefile.mk new file mode 100644 index 0000000000..d93f0488c5 --- /dev/null +++ b/src/soc/nvidia/tegra210/Makefile.mk @@ -0,0 +1,161 @@ +## SPDX-License-Identifier: GPL-2.0-only +ifeq ($(CONFIG_SOC_NVIDIA_TEGRA210),y) + +CBOOTIMAGE_OPTS = --soc tegra210 + +bootblock-y += bootblock.c +bootblock-y += bootblock_asm.S +bootblock-y += clock.c +bootblock-y += spi.c +bootblock-y += i2c.c +bootblock-y += dma.c +bootblock-y += monotonic_timer.c +bootblock-y += padconfig.c +bootblock-y += power.c +bootblock-y += funitcfg.c +bootblock-y += ../tegra/gpio.c +bootblock-y += ../tegra/i2c.c +bootblock-y += ../tegra/pingroup.c +bootblock-y += ../tegra/pinmux.c +bootblock-y += ../tegra/apbmisc.c +bootblock-y += ../tegra/usb.c +bootblock-y += uart.c + +verstage-y += dma.c +verstage-y += monotonic_timer.c +verstage-y += spi.c +verstage-y += padconfig.c +verstage-y += funitcfg.c +verstage-y += uart.c +verstage-y += ../tegra/gpio.c +verstage-y += ../tegra/i2c.c +verstage-y += ../tegra/pinmux.c +verstage-y += clock.c +verstage-y += i2c.c + +romstage-y += romstage_asm.S +romstage-y += addressmap.c +romstage-y += cbmem.c +romstage-y += ccplex.c +romstage-y += clock.c +romstage-y += cpu.c +romstage-y += spi.c +romstage-y += i2c.c +romstage-y += dma.c +romstage-y += monotonic_timer.c +romstage-y += padconfig.c +romstage-y += funitcfg.c +romstage-y += romstage.c +romstage-y += power.c +romstage-y += ram_code.c +ifneq ($(CONFIG_BOOTROM_SDRAM_INIT),y) +romstage-y += sdram.c +romstage-y += sdram_lp0.c +endif +romstage-y += ../tegra/gpio.c +romstage-y += ../tegra/i2c.c +romstage-y += ../tegra/pinmux.c +romstage-y += ../tegra/usb.c +romstage-y += uart.c + +ramstage-y += addressmap.c +ramstage-y += cbmem.c +ramstage-y += cpu.c +ramstage-y += clock.c +ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += dc.c +ramstage-$(CONFIG_MAINBOARD_DO_DSI_INIT) += dsi.c +ramstage-$(CONFIG_MAINBOARD_DO_DSI_INIT) += mipi_dsi.c +ramstage-$(CONFIG_MAINBOARD_DO_DSI_INIT) += mipi.c +ramstage-$(CONFIG_MAINBOARD_DO_DSI_INIT) += mipi-phy.c +ramstage-$(CONFIG_MAINBOARD_DO_DSI_INIT) += ./jdi_25x18_display/panel-jdi-lpm102a188a.c +ramstage-$(CONFIG_MAINBOARD_DO_SOR_INIT) += dp.c +ramstage-$(CONFIG_MAINBOARD_DO_SOR_INIT) += sor.c +ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += arm_tf.c + +ramstage-y += sdram_lp0.c +ramstage-y += soc.c +ramstage-y += spi.c +ramstage-y += i2c.c +ramstage-y += i2c6.c +ramstage-y += ape.c +ramstage-y += power.c +ramstage-y += dma.c +ramstage-y += monotonic_timer.c +ramstage-y += padconfig.c +ramstage-y += funitcfg.c +ramstage-y += ram_code.c +ramstage-y += ../tegra/apbmisc.c +ramstage-y += ../tegra/gpio.c +ramstage-y += ../tegra/i2c.c +ramstage-y += ../tegra/pinmux.c +ramstage-y += ramstage.c +ramstage-y += mmu_operations.c +ramstage-y += uart.c +ramstage-y += ../tegra/usb.c +ramstage-$(CONFIG_HAVE_MTC) += mtc.c +ramstage-y += stage_entry.S + +rmodules_arm-y += monotonic_timer.c + +CPPFLAGS_common += -Isrc/soc/nvidia/tegra210/include/ + +# We want to grab the bootblock right before it goes into the image and wrap +# it inside a BCT, but ideally we would do that without making special, one +# use modifications to the main ARM Makefile. We do this in two ways. First, +# we copy bootblock.elf to bootblock.raw.elf and allow the %.bin: %.elf +# template rule to turn it into bootblock.raw.bin. This makes sure whatever +# processing is supposed to happen to turn an .elf into a .bin happens. +# +# Second, we add our own rule for creating bootblock.bin from +# bootblock.raw.bin which displaces the template rule. When other rules that +# package up the image pull in bootblock.bin, it will be this wrapped version +# instead of the raw bootblock. + +$(objcbfs)/bootblock.raw.elf: $(objcbfs)/bootblock.elf + cp $< $@ + +$(obj)/generated/bct.bin: $(obj)/generated/bct.cfg $(CBOOTIMAGE) + @printf " CBOOTIMAGE $(subst $(obj)/,,$(@))\n" + $(CBOOTIMAGE) -gbct $(CBOOTIMAGE_OPTS) $< $@ + +BCT_BIN = $(obj)/generated/bct.bin +BCT_WRAPPER = $(obj)/generated/bct.wrapper +$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin $(BCT_BIN) + echo "Version = 1;" > $(BCT_WRAPPER) + echo "Redundancy = 1;" >> $(BCT_WRAPPER) + echo "Bctcopy = 1;" >> $(BCT_WRAPPER) + echo "Bctfile = $(BCT_BIN);" >> $(BCT_WRAPPER) + echo "BootLoader = $<,$(call loadaddr,bootblock),$(call loadaddr,bootblock),Complete;" >> $(BCT_WRAPPER) + @printf " CBOOTIMAGE $(subst $(obj)/,,$(@))\n" + $(CBOOTIMAGE) $(CBOOTIMAGE_OPTS) $(BCT_WRAPPER) $@ + +# We need to ensure that TZ memory has enough space to hold TTB and resident EL3 +# components (including BL31 and Secure OS) +ttb_size=$(shell printf "%d" $(CONFIG_TTB_SIZE_MB)) +sec_size=$(shell printf "%d" $(CONFIG_SEC_COMPONENT_SIZE_MB)) +req_tz_size=$(shell expr $(ttb_size) + $(sec_size)) + +tz_size=$(shell printf "%d" $(CONFIG_TRUSTZONE_CARVEOUT_SIZE_MB)) + +ifeq ($(shell test $(tz_size) -lt $(req_tz_size) && echo 1), 1) + $(error "TRUSTZONE_CARVEOUT_SIZE_MB should be at least as big as TTB_SIZE_MB + SEC_COMPONENT_SIZE_MB") +endif + +# BL31 component is placed towards the end of 32-bit address space. This assumes +# that TrustZone memory is placed at the end of 32-bit address space. Within the +# TZ memory, we place BL31 and BL32(if available) towards the beginning and TTB +# towards the end. Calculate TZDRAM_BASE i.e. base of BL31 component by: +# 0x1000 = end of 32-bit address space in MiB +# 0x1000 - $(CONFIG_TRUSTZONE_CARVEOUT_SIZE_MB) = start of TZ memory in MiB +BL31_MAKEARGS += TZDRAM_BASE=$$(((0x1000 - $(CONFIG_TRUSTZONE_CARVEOUT_SIZE_MB)) << 20)) +BL31_MAKEARGS += PLAT=tegra TARGET_SOC=t210 + +# MTC fw +MTC_DIR = $(CONFIG_MTC_DIRECTORY) +MTC_FILE = $(MTC_DIR)/$(CONFIG_MTC_FILE) +MTC_FILE_CBFS = $(CONFIG_MTC_FILE) +cbfs-files-$(CONFIG_HAVE_MTC) += $(MTC_FILE_CBFS) +$(MTC_FILE_CBFS)-file := $(MTC_FILE) +$(MTC_FILE_CBFS)-type := raw + +endif diff --git a/src/soc/qualcomm/ipq40xx/Makefile.inc b/src/soc/qualcomm/ipq40xx/Makefile.inc deleted file mode 100644 index bd61a62a45..0000000000 --- a/src/soc/qualcomm/ipq40xx/Makefile.inc +++ /dev/null @@ -1,71 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -ifeq ($(CONFIG_SOC_QC_IPQ40XX),y) - -bootblock-y += clock.c -bootblock-y += gpio.c -bootblock-$(CONFIG_SPI_FLASH) += spi.c -bootblock-y += timer.c -bootblock-y += uart.c - -verstage-y += clock.c -verstage-y += gpio.c -verstage-y += blsp.c -verstage-y += i2c.c -verstage-y += qup.c -verstage-y += spi.c -verstage-y += timer.c -verstage-y += uart.c - -romstage-y += clock.c -romstage-y += blobs_init.c -romstage-y += gpio.c -romstage-$(CONFIG_SPI_FLASH) += spi.c -romstage-y += timer.c -romstage-y += uart.c -romstage-y += cbmem.c -romstage-y += i2c.c -romstage-y += blsp.c -romstage-y += qup.c - -ramstage-y += blobs_init.c -ramstage-y += clock.c -ramstage-y += gpio.c -ramstage-y += lcc.c -ramstage-y += soc.c -ramstage-$(CONFIG_SPI_FLASH) += spi.c -ramstage-y += timer.c -ramstage-y += uart.c # Want the UART always ready for the kernels' earlyprintk -ramstage-y += usb.c -ramstage-y += tz_wrapper.S - -ramstage-y += blsp.c -ramstage-y += i2c.c -ramstage-y += qup.c -ramstage-y += spi.c - -ifeq ($(CONFIG_USE_BLOBS),y) - -$(objcbfs)/bootblock.bin: $(call strip_quotes,$(CONFIG_SBL_ELF)) \ - $(objcbfs)/bootblock.elf - @printf " CRXBL $(subst $(obj)/,,$(^)) $(subst $(obj)/,,$(@))\n" - @$(CONFIG_SBL_UTIL_PATH)/createxbl.py -f $(CONFIG_SBL_ELF) \ - -s $(objcbfs)/bootblock.elf -o $@ -a 32 -b 32 - -endif - -CPPFLAGS_common += -Isrc/soc/qualcomm/ipq40xx/include - -# List of binary blobs coreboot needs in CBFS to be able to boot up this SOC -mbn-files := $(CONFIG_CDT_MBN) $(CONFIG_DDR_MBN) $(CONFIG_TZ_MBN) - -# Location of the binary blobs -mbn-root := 3rdparty/blobs/cpu/qualcomm/ipq40xx - -# Create make variables to aid cbfs-files-handler in processing the blobs (add -# them all as raw binaries at the root level). -$(foreach f,$(mbn-files),$(eval cbfs-files-y += $(f))\ - $(eval $(f)-file := $(mbn-root)/$(f))\ - $(eval $(f)-type := raw)) - -endif diff --git a/src/soc/qualcomm/ipq40xx/Makefile.mk b/src/soc/qualcomm/ipq40xx/Makefile.mk new file mode 100644 index 0000000000..bd61a62a45 --- /dev/null +++ b/src/soc/qualcomm/ipq40xx/Makefile.mk @@ -0,0 +1,71 @@ +## SPDX-License-Identifier: GPL-2.0-only + +ifeq ($(CONFIG_SOC_QC_IPQ40XX),y) + +bootblock-y += clock.c +bootblock-y += gpio.c +bootblock-$(CONFIG_SPI_FLASH) += spi.c +bootblock-y += timer.c +bootblock-y += uart.c + +verstage-y += clock.c +verstage-y += gpio.c +verstage-y += blsp.c +verstage-y += i2c.c +verstage-y += qup.c +verstage-y += spi.c +verstage-y += timer.c +verstage-y += uart.c + +romstage-y += clock.c +romstage-y += blobs_init.c +romstage-y += gpio.c +romstage-$(CONFIG_SPI_FLASH) += spi.c +romstage-y += timer.c +romstage-y += uart.c +romstage-y += cbmem.c +romstage-y += i2c.c +romstage-y += blsp.c +romstage-y += qup.c + +ramstage-y += blobs_init.c +ramstage-y += clock.c +ramstage-y += gpio.c +ramstage-y += lcc.c +ramstage-y += soc.c +ramstage-$(CONFIG_SPI_FLASH) += spi.c +ramstage-y += timer.c +ramstage-y += uart.c # Want the UART always ready for the kernels' earlyprintk +ramstage-y += usb.c +ramstage-y += tz_wrapper.S + +ramstage-y += blsp.c +ramstage-y += i2c.c +ramstage-y += qup.c +ramstage-y += spi.c + +ifeq ($(CONFIG_USE_BLOBS),y) + +$(objcbfs)/bootblock.bin: $(call strip_quotes,$(CONFIG_SBL_ELF)) \ + $(objcbfs)/bootblock.elf + @printf " CRXBL $(subst $(obj)/,,$(^)) $(subst $(obj)/,,$(@))\n" + @$(CONFIG_SBL_UTIL_PATH)/createxbl.py -f $(CONFIG_SBL_ELF) \ + -s $(objcbfs)/bootblock.elf -o $@ -a 32 -b 32 + +endif + +CPPFLAGS_common += -Isrc/soc/qualcomm/ipq40xx/include + +# List of binary blobs coreboot needs in CBFS to be able to boot up this SOC +mbn-files := $(CONFIG_CDT_MBN) $(CONFIG_DDR_MBN) $(CONFIG_TZ_MBN) + +# Location of the binary blobs +mbn-root := 3rdparty/blobs/cpu/qualcomm/ipq40xx + +# Create make variables to aid cbfs-files-handler in processing the blobs (add +# them all as raw binaries at the root level). +$(foreach f,$(mbn-files),$(eval cbfs-files-y += $(f))\ + $(eval $(f)-file := $(mbn-root)/$(f))\ + $(eval $(f)-type := raw)) + +endif diff --git a/src/soc/qualcomm/ipq806x/Makefile.inc b/src/soc/qualcomm/ipq806x/Makefile.inc deleted file mode 100644 index c01486d3a8..0000000000 --- a/src/soc/qualcomm/ipq806x/Makefile.inc +++ /dev/null @@ -1,77 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -ifeq ($(CONFIG_SOC_QC_IPQ806X),y) - -bootblock-y += clock.c -bootblock-y += gpio.c -bootblock-$(CONFIG_SPI_FLASH) += spi.c -bootblock-y += timer.c -bootblock-y += uart.c - -verstage-y += clock.c -verstage-y += gpio.c -verstage-y += gsbi.c -verstage-y += i2c.c -verstage-y += qup.c -verstage-y += spi.c -verstage-y += timer.c -verstage-y += uart.c - -romstage-y += clock.c -romstage-y += blobs_init.c -romstage-y += gpio.c -romstage-$(CONFIG_SPI_FLASH) += spi.c -romstage-y += timer.c -romstage-y += uart.c -romstage-y += cbmem.c -romstage-y += i2c.c -romstage-y += gsbi.c -romstage-y += qup.c - -ramstage-y += blobs_init.c -ramstage-y += clock.c -ramstage-y += gpio.c -ramstage-y += lcc.c -ramstage-y += soc.c -ramstage-$(CONFIG_SPI_FLASH) += spi.c -ramstage-y += timer.c -ramstage-y += uart.c # Want the UART always ready for the kernels' earlyprintk -ramstage-y += usb.c -ramstage-y += tz_wrapper.S -ramstage-y += gsbi.c -ramstage-y += i2c.c -ramstage-y += qup.c -ramstage-y += spi.c - -ifeq ($(CONFIG_USE_BLOBS),y) - -# Add MBN header to allow SBL3 to start coreboot bootblock -$(objcbfs)/bootblock.mbn: $(objcbfs)/bootblock.raw.bin - @printf " ADD MBN $(subst $(obj)/,,$(@))\n" - ./util/qualcomm/ipqheader.py $(call loadaddr,bootblock) $< $@.tmp - @mv $@.tmp $@ - -# Create a complete bootblock which will start up the system -$(objcbfs)/bootblock.bin: $(call strip_quotes,$(CONFIG_SBL_BLOB)) \ - $(objcbfs)/bootblock.mbn - @printf " MBNCAT $(subst $(obj)/,,$(@))\n" - @util/qualcomm/mbncat.py -o $@.tmp $^ - @mv $@.tmp $@ - -endif - -CPPFLAGS_common += -Isrc/soc/qualcomm/ipq806x/include - -# List of binary blobs coreboot needs in CBFS to be able to boot up this SOC -mbn-files := cdt.mbn ddr.mbn rpm.mbn tz.mbn - -# Location of the binary blobs -mbn-root := 3rdparty/blobs/cpu/qualcomm/ipq806x - -# Create make variables to aid cbfs-files-handler in processing the blobs (add -# them all as raw binaries at the root level). -$(foreach f,$(mbn-files),$(eval cbfs-files-y += $(f))\ - $(eval $(f)-file := $(mbn-root)/$(f))\ - $(eval $(f)-type := raw)) - -endif diff --git a/src/soc/qualcomm/ipq806x/Makefile.mk b/src/soc/qualcomm/ipq806x/Makefile.mk new file mode 100644 index 0000000000..c01486d3a8 --- /dev/null +++ b/src/soc/qualcomm/ipq806x/Makefile.mk @@ -0,0 +1,77 @@ +## SPDX-License-Identifier: GPL-2.0-only + +ifeq ($(CONFIG_SOC_QC_IPQ806X),y) + +bootblock-y += clock.c +bootblock-y += gpio.c +bootblock-$(CONFIG_SPI_FLASH) += spi.c +bootblock-y += timer.c +bootblock-y += uart.c + +verstage-y += clock.c +verstage-y += gpio.c +verstage-y += gsbi.c +verstage-y += i2c.c +verstage-y += qup.c +verstage-y += spi.c +verstage-y += timer.c +verstage-y += uart.c + +romstage-y += clock.c +romstage-y += blobs_init.c +romstage-y += gpio.c +romstage-$(CONFIG_SPI_FLASH) += spi.c +romstage-y += timer.c +romstage-y += uart.c +romstage-y += cbmem.c +romstage-y += i2c.c +romstage-y += gsbi.c +romstage-y += qup.c + +ramstage-y += blobs_init.c +ramstage-y += clock.c +ramstage-y += gpio.c +ramstage-y += lcc.c +ramstage-y += soc.c +ramstage-$(CONFIG_SPI_FLASH) += spi.c +ramstage-y += timer.c +ramstage-y += uart.c # Want the UART always ready for the kernels' earlyprintk +ramstage-y += usb.c +ramstage-y += tz_wrapper.S +ramstage-y += gsbi.c +ramstage-y += i2c.c +ramstage-y += qup.c +ramstage-y += spi.c + +ifeq ($(CONFIG_USE_BLOBS),y) + +# Add MBN header to allow SBL3 to start coreboot bootblock +$(objcbfs)/bootblock.mbn: $(objcbfs)/bootblock.raw.bin + @printf " ADD MBN $(subst $(obj)/,,$(@))\n" + ./util/qualcomm/ipqheader.py $(call loadaddr,bootblock) $< $@.tmp + @mv $@.tmp $@ + +# Create a complete bootblock which will start up the system +$(objcbfs)/bootblock.bin: $(call strip_quotes,$(CONFIG_SBL_BLOB)) \ + $(objcbfs)/bootblock.mbn + @printf " MBNCAT $(subst $(obj)/,,$(@))\n" + @util/qualcomm/mbncat.py -o $@.tmp $^ + @mv $@.tmp $@ + +endif + +CPPFLAGS_common += -Isrc/soc/qualcomm/ipq806x/include + +# List of binary blobs coreboot needs in CBFS to be able to boot up this SOC +mbn-files := cdt.mbn ddr.mbn rpm.mbn tz.mbn + +# Location of the binary blobs +mbn-root := 3rdparty/blobs/cpu/qualcomm/ipq806x + +# Create make variables to aid cbfs-files-handler in processing the blobs (add +# them all as raw binaries at the root level). +$(foreach f,$(mbn-files),$(eval cbfs-files-y += $(f))\ + $(eval $(f)-file := $(mbn-root)/$(f))\ + $(eval $(f)-type := raw)) + +endif diff --git a/src/soc/qualcomm/qcs405/Makefile.inc b/src/soc/qualcomm/qcs405/Makefile.inc deleted file mode 100644 index 5512af5650..0000000000 --- a/src/soc/qualcomm/qcs405/Makefile.inc +++ /dev/null @@ -1,31 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -ifeq ($(CONFIG_SOC_QUALCOMM_QCS405),y) - -################################################################################ -all-y += clock.c -all-y += spi.c -all-y += ../common/timer.c -all-y += gpio.c -all-y += i2c.c -all-y += qup.c -all-y += blsp.c -all-$(CONFIG_DRIVERS_UART) += uart.c - -################################################################################ -bootblock-y += bootblock.c -bootblock-y += mmu.c - -################################################################################ -romstage-y += cbmem.c -romstage-y += usb.c - -################################################################################ -ramstage-y += soc.c -ramstage-y += usb.c - -################################################################################ - -CPPFLAGS_common += -Isrc/soc/qualcomm/qcs405/include - -endif diff --git a/src/soc/qualcomm/qcs405/Makefile.mk b/src/soc/qualcomm/qcs405/Makefile.mk new file mode 100644 index 0000000000..5512af5650 --- /dev/null +++ b/src/soc/qualcomm/qcs405/Makefile.mk @@ -0,0 +1,31 @@ +## SPDX-License-Identifier: GPL-2.0-only + +ifeq ($(CONFIG_SOC_QUALCOMM_QCS405),y) + +################################################################################ +all-y += clock.c +all-y += spi.c +all-y += ../common/timer.c +all-y += gpio.c +all-y += i2c.c +all-y += qup.c +all-y += blsp.c +all-$(CONFIG_DRIVERS_UART) += uart.c + +################################################################################ +bootblock-y += bootblock.c +bootblock-y += mmu.c + +################################################################################ +romstage-y += cbmem.c +romstage-y += usb.c + +################################################################################ +ramstage-y += soc.c +ramstage-y += usb.c + +################################################################################ + +CPPFLAGS_common += -Isrc/soc/qualcomm/qcs405/include + +endif diff --git a/src/soc/qualcomm/sc7180/Makefile.inc b/src/soc/qualcomm/sc7180/Makefile.inc deleted file mode 100644 index ead5720278..0000000000 --- a/src/soc/qualcomm/sc7180/Makefile.inc +++ /dev/null @@ -1,156 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -ifeq ($(CONFIG_SOC_QUALCOMM_SC7180),y) - -decompressor-y += decompressor.c -decompressor-y += mmu.c -decompressor-y += ../common/timer.c -all-y += ../common/timer.c -all-y += ../common/gpio.c -all-y += ../common/spi.c -all-$(CONFIG_SC7180_QSPI) += ../common/qspi.c -all-y += ../common/qupv3_i2c.c -all-y += ../common/qupv3_spi.c -all-y += clock.c -all-y += ../common/clock.c -all-y += qcom_qup_se.c -all-y += ../common/qupv3_config.c -all-y += ../common/qup_se_handler.c - -################################################################################ -bootblock-y += bootblock.c -bootblock-y += mmu.c -bootblock-$(CONFIG_DRIVERS_UART) += ../common/uart_bitbang.c -################################################################################ -verstage-$(CONFIG_DRIVERS_UART) += ../common/qupv3_uart.c - -################################################################################ -romstage-y += cbmem.c -romstage-y += ../common/qclib.c -romstage-y += ../common/watchdog.c -romstage-y += qclib.c -romstage-y += ../common/mmu.c -romstage-y += mmu.c -romstage-y += ../common/usb/usb.c -romstage-y += carve_out.c -romstage-$(CONFIG_DRIVERS_UART) += ../common/qupv3_uart.c - -################################################################################ -ramstage-y += soc.c -ramstage-y += carve_out.c -ramstage-y += ../common/aop_load_reset.c -ramstage-$(CONFIG_DRIVERS_UART) += ../common/qupv3_uart.c -ramstage-y += ../common/usb/usb.c -ramstage-y += ../common/usb/qusb_phy.c -ramstage-y += ../common/usb/qmpv3_usb_phy.c -ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += display/dsi_phy_pll.c -ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += display/dsi_phy.c -ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += display/dsi.c -ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += display/disp.c -ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += ../common/display/mdss.c - -################################################################################ - -CPPFLAGS_common += -Isrc/soc/qualcomm/sc7180/include -CPPFLAGS_common += -Isrc/soc/qualcomm/common/include - -BL31_MAKEARGS += PLAT=sc7180 - -ifeq ($(CONFIG_USE_QC_BLOBS),y) - -SC7180_BLOB := $(top)/3rdparty/qc_blobs/sc7180 - -ifeq ($(CONFIG_QC_SDI_ENABLE),y) -BL31_MAKEARGS += QTI_SDI_BUILD=1 -BL31_MAKEARGS += QTISECLIB_PATH=$(SC7180_BLOB)/qtiseclib/libqtisec_dbg.a -else -BL31_MAKEARGS += QTISECLIB_PATH=$(SC7180_BLOB)/qtiseclib/libqtisec.a -endif # CONFIG_QC_SDI_ENABLE - -################################################################################ -ifeq ($(CONFIG_QC_SDI_ENABLE),y) -QCSDI_FILE := $(SC7180_BLOB)/boot/QcSdi.elf -QCSDI_CBFS := $(CONFIG_CBFS_PREFIX)/qcsdi -$(QCSDI_CBFS)-file := $(QCSDI_FILE) -$(QCSDI_CBFS)-type := stage -$(QCSDI_CBFS)-compression := $(CBFS_COMPRESS_FLAG) -cbfs-files-y += $(QCSDI_CBFS) -endif - -################################################################################ -QCLIB_FILE := $(SC7180_BLOB)/boot/QcLib.elf -QCLIB_CBFS := $(CONFIG_CBFS_PREFIX)/qclib -$(QCLIB_CBFS)-file := $(QCLIB_FILE) -$(QCLIB_CBFS)-type := stage -$(QCLIB_CBFS)-compression := $(CBFS_PRERAM_COMPRESS_FLAG) -cbfs-files-y += $(QCLIB_CBFS) - -################################################################################ -PMIC_FILE := $(SC7180_BLOB)/boot/Pmic.bin -PMIC_CBFS := $(CONFIG_CBFS_PREFIX)/pmiccfg -$(PMIC_CBFS)-file := $(PMIC_FILE) -$(PMIC_CBFS)-type := raw -$(PMIC_CBFS)-compression := $(CBFS_COMPRESS_FLAG) -cbfs-files-y += $(PMIC_CBFS) - -################################################################################ -DCB_FILE := $(SC7180_BLOB)/boot/dcb.bin -DCB_CBFS := $(CONFIG_CBFS_PREFIX)/dcb -$(DCB_CBFS)-file := $(DCB_FILE) -$(DCB_CBFS)-type := raw -$(DCB_CBFS)-compression := $(CBFS_COMPRESS_FLAG) -cbfs-files-y += $(DCB_CBFS) - -################################################################################ -DCB_LONGSYS1P8_FILE := $(SC7180_BLOB)/boot/dcb_slow.bin -DCB_LONGSYS1P8_CBFS := $(CONFIG_CBFS_PREFIX)/dcb_longsys1p8 -$(DCB_LONGSYS1P8_CBFS)-file := $(DCB_LONGSYS1P8_FILE) -$(DCB_LONGSYS1P8_CBFS)-type := raw -$(DCB_LONGSYS1P8_CBFS)-compression := $(CBFS_COMPRESS_FLAG) -cbfs-files-y += $(DCB_LONGSYS1P8_CBFS) - -################################################################################ -AOP_FILE := $(SC7180_BLOB)/aop/aop.mbn -AOP_CBFS := $(CONFIG_CBFS_PREFIX)/aop -$(AOP_CBFS)-file := $(AOP_FILE) -$(AOP_CBFS)-type := payload -$(AOP_CBFS)-compression := $(CBFS_COMPRESS_FLAG) -cbfs-files-y += $(AOP_CBFS) - -################################################################################ -UART_FW_FILE := $(SC7180_BLOB)/qup_fw/uart_fw.bin -UART_FW_CBFS := $(CONFIG_CBFS_PREFIX)/uart_fw -$(UART_FW_CBFS)-file := $(UART_FW_FILE) -$(UART_FW_CBFS)-type := raw -$(UART_FW_CBFS)-compression := none -cbfs-files-y += $(UART_FW_CBFS) - -################################################################################ -SPI_FW_FILE := $(SC7180_BLOB)/qup_fw/spi_fw.bin -SPI_FW_CBFS := $(CONFIG_CBFS_PREFIX)/spi_fw -$(SPI_FW_CBFS)-file := $(SPI_FW_FILE) -$(SPI_FW_CBFS)-type := raw -$(SPI_FW_CBFS)-compression := none -cbfs-files-y += $(SPI_FW_CBFS) - -################################################################################ -I2C_FW_FILE := $(SC7180_BLOB)/qup_fw/i2c_fw.bin -I2C_FW_CBFS := $(CONFIG_CBFS_PREFIX)/i2c_fw -$(I2C_FW_CBFS)-file := $(I2C_FW_FILE) -$(I2C_FW_CBFS)-type := raw -$(I2C_FW_CBFS)-compression := none -cbfs-files-y += $(I2C_FW_CBFS) - -################################################################################ -QC_SEC_FILE := $(SC7180_BLOB)/qc_sec/qc_sec.mbn -$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.elf - @util/qualcomm/createxbl.py --mbn_version 6 -f $(objcbfs)/bootblock.raw.elf \ - -x $(QC_SEC_FILE) -o $(objcbfs)/merged_bb_qcsec.mbn \ - -a 64 -d 64 -c 64 - @printf "\nqgpt.py 4K sector size\n" - @util/qualcomm/qgpt.py $(objcbfs)/merged_bb_qcsec.mbn \ - $(objcbfs)/bootblock.bin - -endif - -endif diff --git a/src/soc/qualcomm/sc7180/Makefile.mk b/src/soc/qualcomm/sc7180/Makefile.mk new file mode 100644 index 0000000000..ead5720278 --- /dev/null +++ b/src/soc/qualcomm/sc7180/Makefile.mk @@ -0,0 +1,156 @@ +## SPDX-License-Identifier: GPL-2.0-only + +ifeq ($(CONFIG_SOC_QUALCOMM_SC7180),y) + +decompressor-y += decompressor.c +decompressor-y += mmu.c +decompressor-y += ../common/timer.c +all-y += ../common/timer.c +all-y += ../common/gpio.c +all-y += ../common/spi.c +all-$(CONFIG_SC7180_QSPI) += ../common/qspi.c +all-y += ../common/qupv3_i2c.c +all-y += ../common/qupv3_spi.c +all-y += clock.c +all-y += ../common/clock.c +all-y += qcom_qup_se.c +all-y += ../common/qupv3_config.c +all-y += ../common/qup_se_handler.c + +################################################################################ +bootblock-y += bootblock.c +bootblock-y += mmu.c +bootblock-$(CONFIG_DRIVERS_UART) += ../common/uart_bitbang.c +################################################################################ +verstage-$(CONFIG_DRIVERS_UART) += ../common/qupv3_uart.c + +################################################################################ +romstage-y += cbmem.c +romstage-y += ../common/qclib.c +romstage-y += ../common/watchdog.c +romstage-y += qclib.c +romstage-y += ../common/mmu.c +romstage-y += mmu.c +romstage-y += ../common/usb/usb.c +romstage-y += carve_out.c +romstage-$(CONFIG_DRIVERS_UART) += ../common/qupv3_uart.c + +################################################################################ +ramstage-y += soc.c +ramstage-y += carve_out.c +ramstage-y += ../common/aop_load_reset.c +ramstage-$(CONFIG_DRIVERS_UART) += ../common/qupv3_uart.c +ramstage-y += ../common/usb/usb.c +ramstage-y += ../common/usb/qusb_phy.c +ramstage-y += ../common/usb/qmpv3_usb_phy.c +ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += display/dsi_phy_pll.c +ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += display/dsi_phy.c +ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += display/dsi.c +ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += display/disp.c +ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += ../common/display/mdss.c + +################################################################################ + +CPPFLAGS_common += -Isrc/soc/qualcomm/sc7180/include +CPPFLAGS_common += -Isrc/soc/qualcomm/common/include + +BL31_MAKEARGS += PLAT=sc7180 + +ifeq ($(CONFIG_USE_QC_BLOBS),y) + +SC7180_BLOB := $(top)/3rdparty/qc_blobs/sc7180 + +ifeq ($(CONFIG_QC_SDI_ENABLE),y) +BL31_MAKEARGS += QTI_SDI_BUILD=1 +BL31_MAKEARGS += QTISECLIB_PATH=$(SC7180_BLOB)/qtiseclib/libqtisec_dbg.a +else +BL31_MAKEARGS += QTISECLIB_PATH=$(SC7180_BLOB)/qtiseclib/libqtisec.a +endif # CONFIG_QC_SDI_ENABLE + +################################################################################ +ifeq ($(CONFIG_QC_SDI_ENABLE),y) +QCSDI_FILE := $(SC7180_BLOB)/boot/QcSdi.elf +QCSDI_CBFS := $(CONFIG_CBFS_PREFIX)/qcsdi +$(QCSDI_CBFS)-file := $(QCSDI_FILE) +$(QCSDI_CBFS)-type := stage +$(QCSDI_CBFS)-compression := $(CBFS_COMPRESS_FLAG) +cbfs-files-y += $(QCSDI_CBFS) +endif + +################################################################################ +QCLIB_FILE := $(SC7180_BLOB)/boot/QcLib.elf +QCLIB_CBFS := $(CONFIG_CBFS_PREFIX)/qclib +$(QCLIB_CBFS)-file := $(QCLIB_FILE) +$(QCLIB_CBFS)-type := stage +$(QCLIB_CBFS)-compression := $(CBFS_PRERAM_COMPRESS_FLAG) +cbfs-files-y += $(QCLIB_CBFS) + +################################################################################ +PMIC_FILE := $(SC7180_BLOB)/boot/Pmic.bin +PMIC_CBFS := $(CONFIG_CBFS_PREFIX)/pmiccfg +$(PMIC_CBFS)-file := $(PMIC_FILE) +$(PMIC_CBFS)-type := raw +$(PMIC_CBFS)-compression := $(CBFS_COMPRESS_FLAG) +cbfs-files-y += $(PMIC_CBFS) + +################################################################################ +DCB_FILE := $(SC7180_BLOB)/boot/dcb.bin +DCB_CBFS := $(CONFIG_CBFS_PREFIX)/dcb +$(DCB_CBFS)-file := $(DCB_FILE) +$(DCB_CBFS)-type := raw +$(DCB_CBFS)-compression := $(CBFS_COMPRESS_FLAG) +cbfs-files-y += $(DCB_CBFS) + +################################################################################ +DCB_LONGSYS1P8_FILE := $(SC7180_BLOB)/boot/dcb_slow.bin +DCB_LONGSYS1P8_CBFS := $(CONFIG_CBFS_PREFIX)/dcb_longsys1p8 +$(DCB_LONGSYS1P8_CBFS)-file := $(DCB_LONGSYS1P8_FILE) +$(DCB_LONGSYS1P8_CBFS)-type := raw +$(DCB_LONGSYS1P8_CBFS)-compression := $(CBFS_COMPRESS_FLAG) +cbfs-files-y += $(DCB_LONGSYS1P8_CBFS) + +################################################################################ +AOP_FILE := $(SC7180_BLOB)/aop/aop.mbn +AOP_CBFS := $(CONFIG_CBFS_PREFIX)/aop +$(AOP_CBFS)-file := $(AOP_FILE) +$(AOP_CBFS)-type := payload +$(AOP_CBFS)-compression := $(CBFS_COMPRESS_FLAG) +cbfs-files-y += $(AOP_CBFS) + +################################################################################ +UART_FW_FILE := $(SC7180_BLOB)/qup_fw/uart_fw.bin +UART_FW_CBFS := $(CONFIG_CBFS_PREFIX)/uart_fw +$(UART_FW_CBFS)-file := $(UART_FW_FILE) +$(UART_FW_CBFS)-type := raw +$(UART_FW_CBFS)-compression := none +cbfs-files-y += $(UART_FW_CBFS) + +################################################################################ +SPI_FW_FILE := $(SC7180_BLOB)/qup_fw/spi_fw.bin +SPI_FW_CBFS := $(CONFIG_CBFS_PREFIX)/spi_fw +$(SPI_FW_CBFS)-file := $(SPI_FW_FILE) +$(SPI_FW_CBFS)-type := raw +$(SPI_FW_CBFS)-compression := none +cbfs-files-y += $(SPI_FW_CBFS) + +################################################################################ +I2C_FW_FILE := $(SC7180_BLOB)/qup_fw/i2c_fw.bin +I2C_FW_CBFS := $(CONFIG_CBFS_PREFIX)/i2c_fw +$(I2C_FW_CBFS)-file := $(I2C_FW_FILE) +$(I2C_FW_CBFS)-type := raw +$(I2C_FW_CBFS)-compression := none +cbfs-files-y += $(I2C_FW_CBFS) + +################################################################################ +QC_SEC_FILE := $(SC7180_BLOB)/qc_sec/qc_sec.mbn +$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.elf + @util/qualcomm/createxbl.py --mbn_version 6 -f $(objcbfs)/bootblock.raw.elf \ + -x $(QC_SEC_FILE) -o $(objcbfs)/merged_bb_qcsec.mbn \ + -a 64 -d 64 -c 64 + @printf "\nqgpt.py 4K sector size\n" + @util/qualcomm/qgpt.py $(objcbfs)/merged_bb_qcsec.mbn \ + $(objcbfs)/bootblock.bin + +endif + +endif diff --git a/src/soc/qualcomm/sc7280/Makefile.inc b/src/soc/qualcomm/sc7280/Makefile.inc deleted file mode 100644 index ae23f45ede..0000000000 --- a/src/soc/qualcomm/sc7280/Makefile.inc +++ /dev/null @@ -1,180 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ifeq ($(CONFIG_SOC_QUALCOMM_SC7280),y) - -decompressor-y += decompressor.c -decompressor-y += mmu.c -decompressor-y += ../common/timer.c -all-y += ../common/timer.c -all-y += ../common/gpio.c -all-y += ../common/clock.c -all-y += clock.c -all-y += socinfo.c -all-y += ../common/spi.c -all-$(CONFIG_SC7280_QSPI) += ../common/qspi.c -all-y += ../common/qupv3_config.c -all-y += qcom_qup_se.c -all-y += ../common/qup_se_handler.c -all-y += ../common/qupv3_spi.c -all-y += ../common/qupv3_i2c.c -all-y += ../common/qupv3_spi.c - -################################################################################ -bootblock-y += bootblock.c -bootblock-y += mmu.c -bootblock-$(CONFIG_DRIVERS_UART) += ../common/uart_bitbang.c - -################################################################################ -verstage-$(CONFIG_DRIVERS_UART) += ../common/qupv3_uart.c - -################################################################################ -romstage-y += cbmem.c -romstage-y += shrm_load_reset.c -romstage-y += cpucp_load_reset.c -romstage-y += ../common/qclib.c -romstage-y += ../common/mmu.c -romstage-y += ../common/watchdog.c -romstage-y += mmu.c -romstage-y += ../common/usb/usb.c -romstage-y += carve_out.c -romstage-y += ../common/aop_load_reset.c -romstage-$(CONFIG_DRIVERS_UART) += ../common/qupv3_uart.c - -################################################################################ -ramstage-y += soc.c -ramstage-y += carve_out.c -ramstage-y += cbmem.c -ramstage-$(CONFIG_DRIVERS_UART) += ../common/qupv3_uart.c -ramstage-y += ../common/usb/usb.c -ramstage-y += ../common/usb/snps_usb_phy.c -ramstage-y += ../common/usb/qmpv4_usb_phy.c -ramstage-y += cpucp_load_reset.c -ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += display/edp_aux.c -ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += display/edp_ctrl.c -ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += display/edp_phy_7nm.c -ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += ../common/display/mdss.c -ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += display/disp.c -ramstage-$(CONFIG_PCI) += ../common/pcie_common.c -ramstage-$(CONFIG_PCI) += pcie.c -ramstage-$(CONFIG_SDHCI_CONTROLLER) += sdhci.c ../common/storage/sdhci_msm.c - -################################################################################ - -CPPFLAGS_common += -Isrc/soc/qualcomm/sc7280/include -CPPFLAGS_common += -Isrc/soc/qualcomm/common/include - -BL31_MAKEARGS += PLAT=sc7280 - -################################################################################ -ifeq ($(CONFIG_USE_QC_BLOBS),y) -SC7280_BLOB := $(top)/3rdparty/qc_blobs/sc7280 - -ifeq ($(CONFIG_QC_SDI_ENABLE),y) -BL31_MAKEARGS += QTI_SDI_BUILD=1 -BL31_MAKEARGS += QTISECLIB_PATH=$(SC7280_BLOB)/qtiseclib/libqtisec_dbg.a -else -BL31_MAKEARGS += QTISECLIB_PATH=$(SC7280_BLOB)/qtiseclib/libqtisec.a -endif # CONFIG_QC_SDI_ENABLE - -################################################################################ -ifeq ($(CONFIG_QC_SDI_ENABLE),y) -QCSDI_FILE := $(SC7280_BLOB)/boot/QcSdi.elf -QCSDI_CBFS := $(CONFIG_CBFS_PREFIX)/qcsdi -$(QCSDI_CBFS)-file := $(QCSDI_FILE) -$(QCSDI_CBFS)-type := stage -$(QCSDI_CBFS)-compression := $(CBFS_COMPRESS_FLAG) -cbfs-files-y += $(QCSDI_CBFS) -endif - -################################################################################ -QC_SEC_FILE := $(SC7280_BLOB)/qc_sec/qc_sec.mbn -$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.elf - @util/qualcomm/createxbl.py --mbn_version 6 -f $(objcbfs)/bootblock.raw.elf \ - -x $(QC_SEC_FILE) -o $(objcbfs)/merged_bb_qcsec.mbn \ - -a 64 -d 64 -c 64 - @printf "\nqgpt.py 4K sector size\n" - @util/qualcomm/qgpt.py $(objcbfs)/merged_bb_qcsec.mbn \ - $(objcbfs)/bootblock.bin - -################################################################################ -QCLIB_FILE := $(SC7280_BLOB)/boot/QcLib.elf -QCLIB_CBFS := $(CONFIG_CBFS_PREFIX)/qclib -$(QCLIB_CBFS)-file := $(QCLIB_FILE) -$(QCLIB_CBFS)-type := stage -$(QCLIB_CBFS)-compression := $(CBFS_PRERAM_COMPRESS_FLAG) -cbfs-files-y += $(QCLIB_CBFS) - -################################################################################ -PMIC_FILE := $(SC7280_BLOB)/boot/Pmic.bin -PMIC_CBFS := $(CONFIG_CBFS_PREFIX)/pmiccfg -$(PMIC_CBFS)-file := $(PMIC_FILE) -$(PMIC_CBFS)-type := raw -$(PMIC_CBFS)-compression := $(CBFS_COMPRESS_FLAG) -cbfs-files-y += $(PMIC_CBFS) - -################################################################################ -DCB_FILE := $(SC7280_BLOB)/boot/dcb.bin -DCB_CBFS := $(CONFIG_CBFS_PREFIX)/dcb -$(DCB_CBFS)-file := $(DCB_FILE) -$(DCB_CBFS)-type := raw -$(DCB_CBFS)-compression := $(CBFS_COMPRESS_FLAG) -cbfs-files-y += $(DCB_CBFS) - -################################################################################ -UART_FW_FILE := $(SC7280_BLOB)/qup_fw/uart_fw.bin -UART_FW_CBFS := $(CONFIG_CBFS_PREFIX)/uart_fw -$(UART_FW_CBFS)-file := $(UART_FW_FILE) -$(UART_FW_CBFS)-type := raw -$(UART_FW_CBFS)-compression := $(CBFS_PRERAM_COMPRESS_FLAG) -cbfs-files-y += $(UART_FW_CBFS) - -################################################################################ -SPI_FW_FILE := $(SC7280_BLOB)/qup_fw/spi_fw.bin -SPI_FW_CBFS := $(CONFIG_CBFS_PREFIX)/spi_fw -$(SPI_FW_CBFS)-file := $(SPI_FW_FILE) -$(SPI_FW_CBFS)-type := raw -$(SPI_FW_CBFS)-compression := $(CBFS_PRERAM_COMPRESS_FLAG) -cbfs-files-y += $(SPI_FW_CBFS) - -################################################################################ -I2C_FW_FILE := $(SC7280_BLOB)/qup_fw/i2c_fw.bin -I2C_FW_CBFS := $(CONFIG_CBFS_PREFIX)/i2c_fw -$(I2C_FW_CBFS)-file := $(I2C_FW_FILE) -$(I2C_FW_CBFS)-type := raw -$(I2C_FW_CBFS)-compression := $(CBFS_PRERAM_COMPRESS_FLAG) -cbfs-files-y += $(I2C_FW_CBFS) - -################################################################################ -AOP_FILE := $(SC7280_BLOB)/aop/aop.mbn -AOP_CBFS := $(CONFIG_CBFS_PREFIX)/aop -$(AOP_CBFS)-file := $(AOP_FILE) -$(AOP_CBFS)-type := payload -$(AOP_CBFS)-compression := $(CBFS_COMPRESS_FLAG) -cbfs-files-y += $(AOP_CBFS) - -################################################################################ -CPUCP_FILE := $(SC7280_BLOB)/cpucp/cpucp.elf -CPUCP_CBFS := $(CONFIG_CBFS_PREFIX)/cpucp -$(CPUCP_CBFS)-file := $(CPUCP_FILE) -$(CPUCP_CBFS)-type := payload -$(CPUCP_CBFS)-compression := $(CBFS_COMPRESS_FLAG) -cbfs-files-y += $(CPUCP_CBFS) - -################################################################################ -SHRM_FILE := $(SC7280_BLOB)/shrm/shrm.elf -SHRM_CBFS := $(CONFIG_CBFS_PREFIX)/shrm -$(SHRM_CBFS)-file := $(SHRM_FILE) -$(SHRM_CBFS)-type := payload -$(SHRM_CBFS)-compression := $(CBFS_PRERAM_COMPRESS_FLAG) -cbfs-files-y += $(SHRM_CBFS) - -################################################################################ -GSI_FW_FILE := $(SC7280_BLOB)/qup_fw/gsi_fw.bin -GSI_FW_CBFS := $(CONFIG_CBFS_PREFIX)/gsi_fw -$(GSI_FW_CBFS)-file := $(GSI_FW_FILE) -$(GSI_FW_CBFS)-type := raw -$(GSI_FW_CBFS)-compression := $(CBFS_COMPRESS_FLAG) -cbfs-files-y += $(GSI_FW_CBFS) - -endif - -endif diff --git a/src/soc/qualcomm/sc7280/Makefile.mk b/src/soc/qualcomm/sc7280/Makefile.mk new file mode 100644 index 0000000000..ae23f45ede --- /dev/null +++ b/src/soc/qualcomm/sc7280/Makefile.mk @@ -0,0 +1,180 @@ +## SPDX-License-Identifier: GPL-2.0-only +ifeq ($(CONFIG_SOC_QUALCOMM_SC7280),y) + +decompressor-y += decompressor.c +decompressor-y += mmu.c +decompressor-y += ../common/timer.c +all-y += ../common/timer.c +all-y += ../common/gpio.c +all-y += ../common/clock.c +all-y += clock.c +all-y += socinfo.c +all-y += ../common/spi.c +all-$(CONFIG_SC7280_QSPI) += ../common/qspi.c +all-y += ../common/qupv3_config.c +all-y += qcom_qup_se.c +all-y += ../common/qup_se_handler.c +all-y += ../common/qupv3_spi.c +all-y += ../common/qupv3_i2c.c +all-y += ../common/qupv3_spi.c + +################################################################################ +bootblock-y += bootblock.c +bootblock-y += mmu.c +bootblock-$(CONFIG_DRIVERS_UART) += ../common/uart_bitbang.c + +################################################################################ +verstage-$(CONFIG_DRIVERS_UART) += ../common/qupv3_uart.c + +################################################################################ +romstage-y += cbmem.c +romstage-y += shrm_load_reset.c +romstage-y += cpucp_load_reset.c +romstage-y += ../common/qclib.c +romstage-y += ../common/mmu.c +romstage-y += ../common/watchdog.c +romstage-y += mmu.c +romstage-y += ../common/usb/usb.c +romstage-y += carve_out.c +romstage-y += ../common/aop_load_reset.c +romstage-$(CONFIG_DRIVERS_UART) += ../common/qupv3_uart.c + +################################################################################ +ramstage-y += soc.c +ramstage-y += carve_out.c +ramstage-y += cbmem.c +ramstage-$(CONFIG_DRIVERS_UART) += ../common/qupv3_uart.c +ramstage-y += ../common/usb/usb.c +ramstage-y += ../common/usb/snps_usb_phy.c +ramstage-y += ../common/usb/qmpv4_usb_phy.c +ramstage-y += cpucp_load_reset.c +ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += display/edp_aux.c +ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += display/edp_ctrl.c +ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += display/edp_phy_7nm.c +ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += ../common/display/mdss.c +ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += display/disp.c +ramstage-$(CONFIG_PCI) += ../common/pcie_common.c +ramstage-$(CONFIG_PCI) += pcie.c +ramstage-$(CONFIG_SDHCI_CONTROLLER) += sdhci.c ../common/storage/sdhci_msm.c + +################################################################################ + +CPPFLAGS_common += -Isrc/soc/qualcomm/sc7280/include +CPPFLAGS_common += -Isrc/soc/qualcomm/common/include + +BL31_MAKEARGS += PLAT=sc7280 + +################################################################################ +ifeq ($(CONFIG_USE_QC_BLOBS),y) +SC7280_BLOB := $(top)/3rdparty/qc_blobs/sc7280 + +ifeq ($(CONFIG_QC_SDI_ENABLE),y) +BL31_MAKEARGS += QTI_SDI_BUILD=1 +BL31_MAKEARGS += QTISECLIB_PATH=$(SC7280_BLOB)/qtiseclib/libqtisec_dbg.a +else +BL31_MAKEARGS += QTISECLIB_PATH=$(SC7280_BLOB)/qtiseclib/libqtisec.a +endif # CONFIG_QC_SDI_ENABLE + +################################################################################ +ifeq ($(CONFIG_QC_SDI_ENABLE),y) +QCSDI_FILE := $(SC7280_BLOB)/boot/QcSdi.elf +QCSDI_CBFS := $(CONFIG_CBFS_PREFIX)/qcsdi +$(QCSDI_CBFS)-file := $(QCSDI_FILE) +$(QCSDI_CBFS)-type := stage +$(QCSDI_CBFS)-compression := $(CBFS_COMPRESS_FLAG) +cbfs-files-y += $(QCSDI_CBFS) +endif + +################################################################################ +QC_SEC_FILE := $(SC7280_BLOB)/qc_sec/qc_sec.mbn +$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.elf + @util/qualcomm/createxbl.py --mbn_version 6 -f $(objcbfs)/bootblock.raw.elf \ + -x $(QC_SEC_FILE) -o $(objcbfs)/merged_bb_qcsec.mbn \ + -a 64 -d 64 -c 64 + @printf "\nqgpt.py 4K sector size\n" + @util/qualcomm/qgpt.py $(objcbfs)/merged_bb_qcsec.mbn \ + $(objcbfs)/bootblock.bin + +################################################################################ +QCLIB_FILE := $(SC7280_BLOB)/boot/QcLib.elf +QCLIB_CBFS := $(CONFIG_CBFS_PREFIX)/qclib +$(QCLIB_CBFS)-file := $(QCLIB_FILE) +$(QCLIB_CBFS)-type := stage +$(QCLIB_CBFS)-compression := $(CBFS_PRERAM_COMPRESS_FLAG) +cbfs-files-y += $(QCLIB_CBFS) + +################################################################################ +PMIC_FILE := $(SC7280_BLOB)/boot/Pmic.bin +PMIC_CBFS := $(CONFIG_CBFS_PREFIX)/pmiccfg +$(PMIC_CBFS)-file := $(PMIC_FILE) +$(PMIC_CBFS)-type := raw +$(PMIC_CBFS)-compression := $(CBFS_COMPRESS_FLAG) +cbfs-files-y += $(PMIC_CBFS) + +################################################################################ +DCB_FILE := $(SC7280_BLOB)/boot/dcb.bin +DCB_CBFS := $(CONFIG_CBFS_PREFIX)/dcb +$(DCB_CBFS)-file := $(DCB_FILE) +$(DCB_CBFS)-type := raw +$(DCB_CBFS)-compression := $(CBFS_COMPRESS_FLAG) +cbfs-files-y += $(DCB_CBFS) + +################################################################################ +UART_FW_FILE := $(SC7280_BLOB)/qup_fw/uart_fw.bin +UART_FW_CBFS := $(CONFIG_CBFS_PREFIX)/uart_fw +$(UART_FW_CBFS)-file := $(UART_FW_FILE) +$(UART_FW_CBFS)-type := raw +$(UART_FW_CBFS)-compression := $(CBFS_PRERAM_COMPRESS_FLAG) +cbfs-files-y += $(UART_FW_CBFS) + +################################################################################ +SPI_FW_FILE := $(SC7280_BLOB)/qup_fw/spi_fw.bin +SPI_FW_CBFS := $(CONFIG_CBFS_PREFIX)/spi_fw +$(SPI_FW_CBFS)-file := $(SPI_FW_FILE) +$(SPI_FW_CBFS)-type := raw +$(SPI_FW_CBFS)-compression := $(CBFS_PRERAM_COMPRESS_FLAG) +cbfs-files-y += $(SPI_FW_CBFS) + +################################################################################ +I2C_FW_FILE := $(SC7280_BLOB)/qup_fw/i2c_fw.bin +I2C_FW_CBFS := $(CONFIG_CBFS_PREFIX)/i2c_fw +$(I2C_FW_CBFS)-file := $(I2C_FW_FILE) +$(I2C_FW_CBFS)-type := raw +$(I2C_FW_CBFS)-compression := $(CBFS_PRERAM_COMPRESS_FLAG) +cbfs-files-y += $(I2C_FW_CBFS) + +################################################################################ +AOP_FILE := $(SC7280_BLOB)/aop/aop.mbn +AOP_CBFS := $(CONFIG_CBFS_PREFIX)/aop +$(AOP_CBFS)-file := $(AOP_FILE) +$(AOP_CBFS)-type := payload +$(AOP_CBFS)-compression := $(CBFS_COMPRESS_FLAG) +cbfs-files-y += $(AOP_CBFS) + +################################################################################ +CPUCP_FILE := $(SC7280_BLOB)/cpucp/cpucp.elf +CPUCP_CBFS := $(CONFIG_CBFS_PREFIX)/cpucp +$(CPUCP_CBFS)-file := $(CPUCP_FILE) +$(CPUCP_CBFS)-type := payload +$(CPUCP_CBFS)-compression := $(CBFS_COMPRESS_FLAG) +cbfs-files-y += $(CPUCP_CBFS) + +################################################################################ +SHRM_FILE := $(SC7280_BLOB)/shrm/shrm.elf +SHRM_CBFS := $(CONFIG_CBFS_PREFIX)/shrm +$(SHRM_CBFS)-file := $(SHRM_FILE) +$(SHRM_CBFS)-type := payload +$(SHRM_CBFS)-compression := $(CBFS_PRERAM_COMPRESS_FLAG) +cbfs-files-y += $(SHRM_CBFS) + +################################################################################ +GSI_FW_FILE := $(SC7280_BLOB)/qup_fw/gsi_fw.bin +GSI_FW_CBFS := $(CONFIG_CBFS_PREFIX)/gsi_fw +$(GSI_FW_CBFS)-file := $(GSI_FW_FILE) +$(GSI_FW_CBFS)-type := raw +$(GSI_FW_CBFS)-compression := $(CBFS_COMPRESS_FLAG) +cbfs-files-y += $(GSI_FW_CBFS) + +endif + +endif diff --git a/src/soc/rockchip/rk3288/Makefile.inc b/src/soc/rockchip/rk3288/Makefile.inc deleted file mode 100644 index 075fa36599..0000000000 --- a/src/soc/rockchip/rk3288/Makefile.inc +++ /dev/null @@ -1,68 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -ifeq ($(CONFIG_SOC_ROCKCHIP_RK3288),y) - -IDBTOOL = util/rockchip/make_idb.py - -bootblock-y += bootblock.c -bootblock-y += ../common/uart.c -bootblock-y += timer.c -bootblock-y += clock.c -bootblock-y += ../common/spi.c -bootblock-y += ../common/gpio.c -bootblock-y += gpio.c -bootblock-y += ../common/i2c.c -bootblock-$(CONFIG_SOFTWARE_I2C) += software_i2c.c -bootblock-y += ../common/rk808.c - -verstage-y += ../common/spi.c -verstage-y += timer.c -verstage-y += ../common/uart.c -verstage-y += ../common/gpio.c -verstage-y += gpio.c -verstage-y += clock.c -verstage-y += crypto.c -verstage-y += ../common/i2c.c -verstage-$(CONFIG_SOFTWARE_I2C) += software_i2c.c - -romstage-y += ../common/cbmem.c -romstage-y += timer.c -romstage-y += ../common/uart.c -romstage-y += ../common/i2c.c -romstage-$(CONFIG_SOFTWARE_I2C) += software_i2c.c -romstage-y += clock.c -romstage-y += ../common/gpio.c -romstage-y += gpio.c -romstage-y += ../common/spi.c -romstage-y += sdram.c -romstage-y += ../common/rk808.c -romstage-y += ../common/pwm.c -romstage-y += tsadc.c -romstage-y += ../common/i2c.c - -ramstage-y += soc.c -ramstage-y += timer.c -ramstage-y += ../common/i2c.c -ramstage-$(CONFIG_SOFTWARE_I2C) += software_i2c.c -ramstage-y += clock.c -ramstage-y += ../common/spi.c -ramstage-y += sdram.c -ramstage-y += ../common/gpio.c -ramstage-y += gpio.c -ramstage-y += ../common/rk808.c -ramstage-y += ../common/pwm.c -ramstage-y += ../common/vop.c -ramstage-y += ../common/edp.c -ramstage-y += hdmi.c -ramstage-y += display.c -ramstage-y += ../common/uart.c - -CPPFLAGS_common += -Isrc/soc/rockchip/rk3288/include -CPPFLAGS_common += -Isrc/soc/rockchip/common/include - -$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin - @printf "Generating: $(subst $(obj)/,,$(@))\n" - $(Q)mkdir -p $(dir $@) - $(Q)$(IDBTOOL) --from=$< --to=$@ --enable-align --chip=RK32 - -endif diff --git a/src/soc/rockchip/rk3288/Makefile.mk b/src/soc/rockchip/rk3288/Makefile.mk new file mode 100644 index 0000000000..075fa36599 --- /dev/null +++ b/src/soc/rockchip/rk3288/Makefile.mk @@ -0,0 +1,68 @@ +## SPDX-License-Identifier: GPL-2.0-only + +ifeq ($(CONFIG_SOC_ROCKCHIP_RK3288),y) + +IDBTOOL = util/rockchip/make_idb.py + +bootblock-y += bootblock.c +bootblock-y += ../common/uart.c +bootblock-y += timer.c +bootblock-y += clock.c +bootblock-y += ../common/spi.c +bootblock-y += ../common/gpio.c +bootblock-y += gpio.c +bootblock-y += ../common/i2c.c +bootblock-$(CONFIG_SOFTWARE_I2C) += software_i2c.c +bootblock-y += ../common/rk808.c + +verstage-y += ../common/spi.c +verstage-y += timer.c +verstage-y += ../common/uart.c +verstage-y += ../common/gpio.c +verstage-y += gpio.c +verstage-y += clock.c +verstage-y += crypto.c +verstage-y += ../common/i2c.c +verstage-$(CONFIG_SOFTWARE_I2C) += software_i2c.c + +romstage-y += ../common/cbmem.c +romstage-y += timer.c +romstage-y += ../common/uart.c +romstage-y += ../common/i2c.c +romstage-$(CONFIG_SOFTWARE_I2C) += software_i2c.c +romstage-y += clock.c +romstage-y += ../common/gpio.c +romstage-y += gpio.c +romstage-y += ../common/spi.c +romstage-y += sdram.c +romstage-y += ../common/rk808.c +romstage-y += ../common/pwm.c +romstage-y += tsadc.c +romstage-y += ../common/i2c.c + +ramstage-y += soc.c +ramstage-y += timer.c +ramstage-y += ../common/i2c.c +ramstage-$(CONFIG_SOFTWARE_I2C) += software_i2c.c +ramstage-y += clock.c +ramstage-y += ../common/spi.c +ramstage-y += sdram.c +ramstage-y += ../common/gpio.c +ramstage-y += gpio.c +ramstage-y += ../common/rk808.c +ramstage-y += ../common/pwm.c +ramstage-y += ../common/vop.c +ramstage-y += ../common/edp.c +ramstage-y += hdmi.c +ramstage-y += display.c +ramstage-y += ../common/uart.c + +CPPFLAGS_common += -Isrc/soc/rockchip/rk3288/include +CPPFLAGS_common += -Isrc/soc/rockchip/common/include + +$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin + @printf "Generating: $(subst $(obj)/,,$(@))\n" + $(Q)mkdir -p $(dir $@) + $(Q)$(IDBTOOL) --from=$< --to=$@ --enable-align --chip=RK32 + +endif diff --git a/src/soc/rockchip/rk3399/Makefile.inc b/src/soc/rockchip/rk3399/Makefile.inc deleted file mode 100644 index 8521bf3e14..0000000000 --- a/src/soc/rockchip/rk3399/Makefile.inc +++ /dev/null @@ -1,75 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only - -ifeq ($(CONFIG_SOC_ROCKCHIP_RK3399),y) - -IDBTOOL = util/rockchip/make_idb.py - -decompressor-y += decompressor.c -decompressor-y += timer.c - -bootblock-y += ../common/i2c.c -bootblock-y += ../common/spi.c -bootblock-y += ../common/uart.c -bootblock-y += ../common/gpio.c -bootblock-y += ../common/pwm.c -bootblock-y += bootblock.c -bootblock-y += clock.c -bootblock-y += gpio.c -bootblock-y += saradc.c -bootblock-y += timer.c - -verstage-y += ../common/gpio.c -verstage-y += gpio.c -verstage-y += sdram.c -verstage-y += ../common/i2c.c -verstage-y += ../common/spi.c -verstage-y += ../common/uart.c -verstage-y += clock.c -verstage-y += timer.c - -################################################################################ - -romstage-y += ../common/cbmem.c -romstage-y += sdram.c -romstage-y += ../common/spi.c -romstage-y += ../common/uart.c -romstage-y += clock.c -romstage-y += ../common/pwm.c -romstage-y += timer.c -romstage-y += tsadc.c -romstage-y += usb.c -romstage-y += gpio.c -romstage-y += saradc.c -romstage-y += ../common/gpio.c -romstage-y += ../common/i2c.c - -################################################################################ - -ramstage-y += sdram.c -ramstage-y += ../common/spi.c -ramstage-y += ../common/uart.c -ramstage-y += clock.c -ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += display.c -ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += ../common/edp.c -ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += mipi.c -ramstage-y += ../common/gpio.c -ramstage-y += gpio.c -ramstage-y += ../common/i2c.c -ramstage-y += saradc.c -ramstage-y += soc.c -ramstage-y += timer.c -ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += ../common/vop.c -ramstage-y += usb.c - -BL31_MAKEARGS += PLAT=rk3399 M0_CROSS_COMPILE="$(CROSS_COMPILE_arm)" -################################################################################ - -CPPFLAGS_common += -Isrc/soc/rockchip/rk3399/include -CPPFLAGS_common += -Isrc/soc/rockchip/common/include - -$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin - @printf "Generating: $(subst $(obj)/,,$(@))\n" - $(Q)mkdir -p $(dir $@) - $(Q)$(IDBTOOL) --from=$< --to=$@ --enable-align --chip=RK33 - -endif diff --git a/src/soc/rockchip/rk3399/Makefile.mk b/src/soc/rockchip/rk3399/Makefile.mk new file mode 100644 index 0000000000..8521bf3e14 --- /dev/null +++ b/src/soc/rockchip/rk3399/Makefile.mk @@ -0,0 +1,75 @@ +## SPDX-License-Identifier: GPL-2.0-only + +ifeq ($(CONFIG_SOC_ROCKCHIP_RK3399),y) + +IDBTOOL = util/rockchip/make_idb.py + +decompressor-y += decompressor.c +decompressor-y += timer.c + +bootblock-y += ../common/i2c.c +bootblock-y += ../common/spi.c +bootblock-y += ../common/uart.c +bootblock-y += ../common/gpio.c +bootblock-y += ../common/pwm.c +bootblock-y += bootblock.c +bootblock-y += clock.c +bootblock-y += gpio.c +bootblock-y += saradc.c +bootblock-y += timer.c + +verstage-y += ../common/gpio.c +verstage-y += gpio.c +verstage-y += sdram.c +verstage-y += ../common/i2c.c +verstage-y += ../common/spi.c +verstage-y += ../common/uart.c +verstage-y += clock.c +verstage-y += timer.c + +################################################################################ + +romstage-y += ../common/cbmem.c +romstage-y += sdram.c +romstage-y += ../common/spi.c +romstage-y += ../common/uart.c +romstage-y += clock.c +romstage-y += ../common/pwm.c +romstage-y += timer.c +romstage-y += tsadc.c +romstage-y += usb.c +romstage-y += gpio.c +romstage-y += saradc.c +romstage-y += ../common/gpio.c +romstage-y += ../common/i2c.c + +################################################################################ + +ramstage-y += sdram.c +ramstage-y += ../common/spi.c +ramstage-y += ../common/uart.c +ramstage-y += clock.c +ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += display.c +ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += ../common/edp.c +ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += mipi.c +ramstage-y += ../common/gpio.c +ramstage-y += gpio.c +ramstage-y += ../common/i2c.c +ramstage-y += saradc.c +ramstage-y += soc.c +ramstage-y += timer.c +ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += ../common/vop.c +ramstage-y += usb.c + +BL31_MAKEARGS += PLAT=rk3399 M0_CROSS_COMPILE="$(CROSS_COMPILE_arm)" +################################################################################ + +CPPFLAGS_common += -Isrc/soc/rockchip/rk3399/include +CPPFLAGS_common += -Isrc/soc/rockchip/common/include + +$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin + @printf "Generating: $(subst $(obj)/,,$(@))\n" + $(Q)mkdir -p $(dir $@) + $(Q)$(IDBTOOL) --from=$< --to=$@ --enable-align --chip=RK33 + +endif diff --git a/src/soc/samsung/exynos5250/Makefile.inc b/src/soc/samsung/exynos5250/Makefile.inc deleted file mode 100644 index 8456a6b35e..0000000000 --- a/src/soc/samsung/exynos5250/Makefile.inc +++ /dev/null @@ -1,53 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ifeq ($(CONFIG_CPU_SAMSUNG_EXYNOS5250),y) - -bootblock-y += spi.c alternate_cbfs.c -bootblock-y += bootblock.c -bootblock-y += pinmux.c timer.c power.c -# Clock is required for UART -bootblock-y += clock_init.c -bootblock-y += clock.c -bootblock-y += uart.c -bootblock-y += wakeup.c -bootblock-y += gpio.c - -romstage-y += spi.c alternate_cbfs.c -romstage-y += clock.c -romstage-y += clock_init.c -romstage-y += pinmux.c # required by s3c24x0_i2c and uart. -romstage-y += dmc_common.c -romstage-y += dmc_init_ddr3.c -romstage-y += power.c -romstage-y += timer.c -romstage-y += uart.c -romstage-y += wakeup.c -romstage-y += gpio.c -romstage-y += trustzone.c -romstage-y += i2c.c -#romstage-y += wdt.c -romstage-y += cbmem.c - -ramstage-y += spi.c alternate_cbfs.c -ramstage-y += clock.c -ramstage-y += clock_init.c -ramstage-y += pinmux.c -ramstage-y += power.c -ramstage-y += uart.c -ramstage-y += cpu.c -ramstage-y += tmu.c -ramstage-y += timer.c -ramstage-y += gpio.c -ramstage-y += i2c.c -ramstage-y += dp-reg.c -ramstage-y += fb.c -ramstage-y += usb.c - -CPPFLAGS_common += -Isrc/soc/samsung/common/include/ -CPPFLAGS_common += -Isrc/soc/samsung/exynos5250/include/ - -$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin - @printf " BL1, CKSUM $(subst $(obj)/,,$(@))\n" - util/exynos/fixed_cksum.py $< $<.cksum 32768 - cat 3rdparty/blobs/cpu/samsung/exynos5250/bl1.bin $<.cksum > $@ - -endif diff --git a/src/soc/samsung/exynos5250/Makefile.mk b/src/soc/samsung/exynos5250/Makefile.mk new file mode 100644 index 0000000000..8456a6b35e --- /dev/null +++ b/src/soc/samsung/exynos5250/Makefile.mk @@ -0,0 +1,53 @@ +## SPDX-License-Identifier: GPL-2.0-only +ifeq ($(CONFIG_CPU_SAMSUNG_EXYNOS5250),y) + +bootblock-y += spi.c alternate_cbfs.c +bootblock-y += bootblock.c +bootblock-y += pinmux.c timer.c power.c +# Clock is required for UART +bootblock-y += clock_init.c +bootblock-y += clock.c +bootblock-y += uart.c +bootblock-y += wakeup.c +bootblock-y += gpio.c + +romstage-y += spi.c alternate_cbfs.c +romstage-y += clock.c +romstage-y += clock_init.c +romstage-y += pinmux.c # required by s3c24x0_i2c and uart. +romstage-y += dmc_common.c +romstage-y += dmc_init_ddr3.c +romstage-y += power.c +romstage-y += timer.c +romstage-y += uart.c +romstage-y += wakeup.c +romstage-y += gpio.c +romstage-y += trustzone.c +romstage-y += i2c.c +#romstage-y += wdt.c +romstage-y += cbmem.c + +ramstage-y += spi.c alternate_cbfs.c +ramstage-y += clock.c +ramstage-y += clock_init.c +ramstage-y += pinmux.c +ramstage-y += power.c +ramstage-y += uart.c +ramstage-y += cpu.c +ramstage-y += tmu.c +ramstage-y += timer.c +ramstage-y += gpio.c +ramstage-y += i2c.c +ramstage-y += dp-reg.c +ramstage-y += fb.c +ramstage-y += usb.c + +CPPFLAGS_common += -Isrc/soc/samsung/common/include/ +CPPFLAGS_common += -Isrc/soc/samsung/exynos5250/include/ + +$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin + @printf " BL1, CKSUM $(subst $(obj)/,,$(@))\n" + util/exynos/fixed_cksum.py $< $<.cksum 32768 + cat 3rdparty/blobs/cpu/samsung/exynos5250/bl1.bin $<.cksum > $@ + +endif diff --git a/src/soc/samsung/exynos5420/Makefile.inc b/src/soc/samsung/exynos5420/Makefile.inc deleted file mode 100644 index aa121323b1..0000000000 --- a/src/soc/samsung/exynos5420/Makefile.inc +++ /dev/null @@ -1,55 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ifeq ($(CONFIG_CPU_SAMSUNG_EXYNOS5420),y) - -bootblock-y += spi.c alternate_cbfs.c -bootblock-y += bootblock.c -bootblock-y += pinmux.c timer.c power.c -# Clock is required for UART -bootblock-y += clock_init.c -bootblock-y += clock.c -bootblock-y += uart.c -bootblock-y += wakeup.c -bootblock-y += gpio.c - -romstage-y += spi.c alternate_cbfs.c -romstage-y += smp.c -romstage-y += clock.c -romstage-y += clock_init.c -romstage-y += pinmux.c # required by s3c24x0_i2c and uart. -romstage-y += dmc_common.c -romstage-y += dmc_init_ddr3.c -romstage-y += power.c -romstage-y += timer.c -romstage-y += uart.c -romstage-y += wakeup.c -romstage-y += gpio.c -romstage-y += i2c.c -#romstage-y += wdt.c -romstage-y += cbmem.c -romstage-y += trustzone.c - -ramstage-y += spi.c alternate_cbfs.c -ramstage-y += clock.c -ramstage-y += clock_init.c -ramstage-y += pinmux.c -ramstage-y += power.c -ramstage-y += uart.c -ramstage-y += cpu.c -ramstage-y += tmu.c -ramstage-y += timer.c -ramstage-y += gpio.c -ramstage-y += i2c.c -ramstage-y += dp.c dp_lowlevel.c fimd.c -ramstage-y += usb.c - -rmodules_$(ARCH-ROMSTAGE-y)-y += timer.c - -CPPFLAGS_common += -Isrc/soc/samsung/common/include/ -CPPFLAGS_common += -Isrc/soc/samsung/exynos5420/include/ - -$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin - @printf " BL1, CKSUM $(subst $(obj)/,,$(@))\n" - util/exynos/variable_cksum.py $< $<.cksum - cat 3rdparty/blobs/cpu/samsung/exynos5420/bl1.bin $<.cksum > $@ - -endif diff --git a/src/soc/samsung/exynos5420/Makefile.mk b/src/soc/samsung/exynos5420/Makefile.mk new file mode 100644 index 0000000000..aa121323b1 --- /dev/null +++ b/src/soc/samsung/exynos5420/Makefile.mk @@ -0,0 +1,55 @@ +## SPDX-License-Identifier: GPL-2.0-only +ifeq ($(CONFIG_CPU_SAMSUNG_EXYNOS5420),y) + +bootblock-y += spi.c alternate_cbfs.c +bootblock-y += bootblock.c +bootblock-y += pinmux.c timer.c power.c +# Clock is required for UART +bootblock-y += clock_init.c +bootblock-y += clock.c +bootblock-y += uart.c +bootblock-y += wakeup.c +bootblock-y += gpio.c + +romstage-y += spi.c alternate_cbfs.c +romstage-y += smp.c +romstage-y += clock.c +romstage-y += clock_init.c +romstage-y += pinmux.c # required by s3c24x0_i2c and uart. +romstage-y += dmc_common.c +romstage-y += dmc_init_ddr3.c +romstage-y += power.c +romstage-y += timer.c +romstage-y += uart.c +romstage-y += wakeup.c +romstage-y += gpio.c +romstage-y += i2c.c +#romstage-y += wdt.c +romstage-y += cbmem.c +romstage-y += trustzone.c + +ramstage-y += spi.c alternate_cbfs.c +ramstage-y += clock.c +ramstage-y += clock_init.c +ramstage-y += pinmux.c +ramstage-y += power.c +ramstage-y += uart.c +ramstage-y += cpu.c +ramstage-y += tmu.c +ramstage-y += timer.c +ramstage-y += gpio.c +ramstage-y += i2c.c +ramstage-y += dp.c dp_lowlevel.c fimd.c +ramstage-y += usb.c + +rmodules_$(ARCH-ROMSTAGE-y)-y += timer.c + +CPPFLAGS_common += -Isrc/soc/samsung/common/include/ +CPPFLAGS_common += -Isrc/soc/samsung/exynos5420/include/ + +$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin + @printf " BL1, CKSUM $(subst $(obj)/,,$(@))\n" + util/exynos/variable_cksum.py $< $<.cksum + cat 3rdparty/blobs/cpu/samsung/exynos5420/bl1.bin $<.cksum > $@ + +endif diff --git a/src/soc/sifive/fu540/Makefile.inc b/src/soc/sifive/fu540/Makefile.inc deleted file mode 100644 index 807c390bb3..0000000000 --- a/src/soc/sifive/fu540/Makefile.inc +++ /dev/null @@ -1,34 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only - -ifeq ($(CONFIG_SOC_SIFIVE_FU540),y) - -bootblock-y += uart.c -bootblock-y += clint.c -bootblock-y += spi.c -bootblock-y += bootblock.c -bootblock-y += clock.c - -romstage-y += uart.c -romstage-y += clint.c -romstage-y += spi.c -romstage-y += sdram.c -romstage-y += cbmem.c -romstage-y += otp.c -romstage-y += clock.c - -ramstage-y += uart.c -ramstage-y += clint.c -ramstage-y += spi.c -ramstage-y += sdram.c -ramstage-y += cbmem.c -ramstage-y += otp.c -ramstage-y += clock.c -ramstage-y += chip.c - -CPPFLAGS_common += -Isrc/soc/sifive/fu540/include - -$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin - @printf " GPT $(notdir $(@))\n" - @util/riscv/sifive-gpt.py $< $@ - -endif diff --git a/src/soc/sifive/fu540/Makefile.mk b/src/soc/sifive/fu540/Makefile.mk new file mode 100644 index 0000000000..807c390bb3 --- /dev/null +++ b/src/soc/sifive/fu540/Makefile.mk @@ -0,0 +1,34 @@ +# SPDX-License-Identifier: GPL-2.0-only + +ifeq ($(CONFIG_SOC_SIFIVE_FU540),y) + +bootblock-y += uart.c +bootblock-y += clint.c +bootblock-y += spi.c +bootblock-y += bootblock.c +bootblock-y += clock.c + +romstage-y += uart.c +romstage-y += clint.c +romstage-y += spi.c +romstage-y += sdram.c +romstage-y += cbmem.c +romstage-y += otp.c +romstage-y += clock.c + +ramstage-y += uart.c +ramstage-y += clint.c +ramstage-y += spi.c +ramstage-y += sdram.c +ramstage-y += cbmem.c +ramstage-y += otp.c +ramstage-y += clock.c +ramstage-y += chip.c + +CPPFLAGS_common += -Isrc/soc/sifive/fu540/include + +$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin + @printf " GPT $(notdir $(@))\n" + @util/riscv/sifive-gpt.py $< $@ + +endif diff --git a/src/soc/ti/Makefile.inc b/src/soc/ti/Makefile.inc deleted file mode 100644 index 7eb83d51eb..0000000000 --- a/src/soc/ti/Makefile.inc +++ /dev/null @@ -1,2 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -subdirs-$(CONFIG_SOC_TI_AM335X) += am335x diff --git a/src/soc/ti/Makefile.mk b/src/soc/ti/Makefile.mk new file mode 100644 index 0000000000..7eb83d51eb --- /dev/null +++ b/src/soc/ti/Makefile.mk @@ -0,0 +1,2 @@ +## SPDX-License-Identifier: GPL-2.0-only +subdirs-$(CONFIG_SOC_TI_AM335X) += am335x diff --git a/src/soc/ti/am335x/Makefile.inc b/src/soc/ti/am335x/Makefile.inc deleted file mode 100644 index e09a0f7e37..0000000000 --- a/src/soc/ti/am335x/Makefile.inc +++ /dev/null @@ -1,51 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ifeq ($(CONFIG_SOC_TI_AM335X),y) -bootblock-y += bootblock.c -bootblock-y += timer.c -bootblock-y += gpio.c -bootblock-y += pinmux.c -bootblock-y += mmc.c - -romstage-y += cbmem.c -romstage-y += timer.c -romstage-y += mmc.c -romstage-y += sdram.c - -ramstage-y += timer.c -ramstage-y += soc.c -ramstage-y += mmc.c - -bootblock-y += uart.c -romstage-y += uart.c -ramstage-y += uart.c - -$(call add-class,omap-header) -$(eval $(call create_class_compiler,omap-header,arm)) - -omap-header-generic-ccopts += -D__COREBOOT_ARM_ARCH__=7 - -real-target: $(obj)/MLO - -header_ld := $(call src-to-obj,omap-header,$(dir)/header.ld) - -get_header_size= \ - $(shell echo $$(wc -c < $(objcbfs)/bootblock.bin)) - -$(obj)/omap-header.bin: $$(omap-header-objs) $(objcbfs)/bootblock.bin - @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC_omap-header) -nostdlib -nostartfiles -static -include $(obj)/config.h \ - -Wl,--defsym,header_load_size=$(strip \ - $(call get_header_size,$(obj)/coreboot.rom) \ - ) \ - -o $@.tmp $< -T $(header_ld) - $(OBJCOPY_omap-header) --only-section=".header" -O binary $@.tmp $@ - -$(obj)/MLO: $(obj)/coreboot.rom $(obj)/omap-header.bin - @printf " HEADER $(subst $(obj)/,,$(@))\n" - $(Q)cat $(obj)/omap-header.bin $(obj)/coreboot.rom > $@ - -omap-header-y += header.c - -omap-header-srcs += $(CONFIG_MEMLAYOUT_LD_FILE) -omap-header-y += header.ld -endif diff --git a/src/soc/ti/am335x/Makefile.mk b/src/soc/ti/am335x/Makefile.mk new file mode 100644 index 0000000000..e09a0f7e37 --- /dev/null +++ b/src/soc/ti/am335x/Makefile.mk @@ -0,0 +1,51 @@ +## SPDX-License-Identifier: GPL-2.0-only +ifeq ($(CONFIG_SOC_TI_AM335X),y) +bootblock-y += bootblock.c +bootblock-y += timer.c +bootblock-y += gpio.c +bootblock-y += pinmux.c +bootblock-y += mmc.c + +romstage-y += cbmem.c +romstage-y += timer.c +romstage-y += mmc.c +romstage-y += sdram.c + +ramstage-y += timer.c +ramstage-y += soc.c +ramstage-y += mmc.c + +bootblock-y += uart.c +romstage-y += uart.c +ramstage-y += uart.c + +$(call add-class,omap-header) +$(eval $(call create_class_compiler,omap-header,arm)) + +omap-header-generic-ccopts += -D__COREBOOT_ARM_ARCH__=7 + +real-target: $(obj)/MLO + +header_ld := $(call src-to-obj,omap-header,$(dir)/header.ld) + +get_header_size= \ + $(shell echo $$(wc -c < $(objcbfs)/bootblock.bin)) + +$(obj)/omap-header.bin: $$(omap-header-objs) $(objcbfs)/bootblock.bin + @printf " CC $(subst $(obj)/,,$(@))\n" + $(CC_omap-header) -nostdlib -nostartfiles -static -include $(obj)/config.h \ + -Wl,--defsym,header_load_size=$(strip \ + $(call get_header_size,$(obj)/coreboot.rom) \ + ) \ + -o $@.tmp $< -T $(header_ld) + $(OBJCOPY_omap-header) --only-section=".header" -O binary $@.tmp $@ + +$(obj)/MLO: $(obj)/coreboot.rom $(obj)/omap-header.bin + @printf " HEADER $(subst $(obj)/,,$(@))\n" + $(Q)cat $(obj)/omap-header.bin $(obj)/coreboot.rom > $@ + +omap-header-y += header.c + +omap-header-srcs += $(CONFIG_MEMLAYOUT_LD_FILE) +omap-header-y += header.ld +endif diff --git a/src/soc/ucb/riscv/Makefile.inc b/src/soc/ucb/riscv/Makefile.inc deleted file mode 100644 index 08fa740a2e..0000000000 --- a/src/soc/ucb/riscv/Makefile.inc +++ /dev/null @@ -1,10 +0,0 @@ -## SPDX-License-Identifier: GPL-2.0-only -ifeq ($(CONFIG_SOC_UCB_RISCV),y) - -romstage-y += cbmem.c - -ramstage-y += cbmem.c - -ramstage-y += chip.c - -endif diff --git a/src/soc/ucb/riscv/Makefile.mk b/src/soc/ucb/riscv/Makefile.mk new file mode 100644 index 0000000000..08fa740a2e --- /dev/null +++ b/src/soc/ucb/riscv/Makefile.mk @@ -0,0 +1,10 @@ +## SPDX-License-Identifier: GPL-2.0-only +ifeq ($(CONFIG_SOC_UCB_RISCV),y) + +romstage-y += cbmem.c + +ramstage-y += cbmem.c + +ramstage-y += chip.c + +endif -- cgit v1.2.3