From c8a041757449d34bb347ee3f5974bbffceececf2 Mon Sep 17 00:00:00 2001 From: Subrata Banik <subratabanik@google.com> Date: Sun, 13 Aug 2023 13:17:22 +0000 Subject: soc/intel/cmn/cse: Display CSE RW FW version by default for LITE SKU MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This patch selects SOC_INTEL_STORE_CSE_FW_VERSION config by default for CSE LITE SKU. It helps to dump the CSE RW firmware version which further consumed by auto-test infrastructure to ensure CSE RW firmware update is successful. BUG=b:285405031 TEST=Able to build and boot google/rex. Verified CSE RW FW version (for LITE SKU) is getting displayed without impacting the boot time. Change-Id: Iba5903c73c0a45b01e6473714e0d5f759c061825 Signed-off-by: Subrata Banik <subratabanik@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/77175 Reviewed-by: Dinesh Gehlot <digehlot@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kapil Porwal <kapilporwal@google.com> --- src/soc/intel/common/block/cse/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src') diff --git a/src/soc/intel/common/block/cse/Kconfig b/src/soc/intel/common/block/cse/Kconfig index bdc17f08aa..f373bd9c8c 100644 --- a/src/soc/intel/common/block/cse/Kconfig +++ b/src/soc/intel/common/block/cse/Kconfig @@ -47,7 +47,7 @@ config SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR config SOC_INTEL_STORE_CSE_FW_VERSION bool - default n + default y depends on SOC_INTEL_CSE_LITE_SKU help This configuration option stores CSE RW FW version in CBMEM area. -- cgit v1.2.3