From c56ca6ba17d141c24d2bc131a62492e2d8b9a7ec Mon Sep 17 00:00:00 2001
From: Maxim Polyakov <max.senia.poliak@gmail.com>
Date: Tue, 15 Oct 2019 14:13:28 +0300
Subject: soc/skylake/vr_config: fix VR config for KBL-U CPUs
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These changes are in accordance with the documentation:
[1] page 106, 7th Generation Intel(R) Processor Families for U/Y
Platforms and 8th Generation Intel(R) Processor Family for U Quad
Core and Y Dual Core Platforms. Datasheet, Volume 1. January 2019.
Document Number: 334661-006
Change-Id: I5232a7a670b97d51ff3b3b71a08f25f961ac1d6f
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36058
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Michael Niewöhner
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
src/soc/intel/skylake/vr_config.c | 21 +++++++++++++++------
1 file changed, 15 insertions(+), 6 deletions(-)
(limited to 'src')
diff --git a/src/soc/intel/skylake/vr_config.c b/src/soc/intel/skylake/vr_config.c
index da2bfc8af2..54dfd31ebe 100644
--- a/src/soc/intel/skylake/vr_config.c
+++ b/src/soc/intel/skylake/vr_config.c
@@ -121,15 +121,17 @@ static uint16_t get_sku_icc_max(int domain)
* SKL-U + OPC (15W) GT3 dual 5.1 29 57/19
* SKL-U (15W) GT2 dual 4.5 29 31
*
- * KBL-U/R + OPC (28W) GT3 dual 5.1 32 57/19
- * KBL-U/R + OPC (15W) GT3 dual 5.1 32 57/19
+ * KBL-U + OPC (28W) GT3 dual 5.1 32 57/19
+ * KBL-U + OPC (15W) GT3 dual 5.1 32 57/19
+ * KBL-U (15W) GT1/2 dual 4.5 32 31
+ * KBL-U [*] (15W) GT1 quad 4.5 29 31
*
* KBL-U/R (15W) GT2 quad 6 64 31
- * KBL-U/R (15W) GT1/2 dual 4.5 32 31
- * KBL-U/R (15W) GT2 quad 4.5 29 31
*
* SKL/KBL-Y (6W) 4.1 24 24
* SKL/KBL-Y (4.5W) 4.1 24 24
+ *
+ * [*] Pentium/Celeron CPUs with HD Graphics 610
*/
switch (mch_id) {
@@ -220,10 +222,17 @@ static uint16_t get_sku_icc_max(int domain)
case PCI_DEVICE_ID_INTEL_KBL_ID_U: {
uint16_t icc_max[NUM_VR_DOMAINS] = VR_CFG_ALL_DOMAINS_ICC(4.5, 32, 31, 31);
- if ((igd_id == PCI_DEVICE_ID_INTEL_KBL_GT3E_SULTM_1) ||
- (igd_id == PCI_DEVICE_ID_INTEL_KBL_GT3E_SULTM_2))
+ if (igd_id == PCI_DEVICE_ID_INTEL_KBL_GT1_SULTM)
icc_max[VR_IA_CORE] = VR_CFG_AMP(29);
+ else if ((igd_id == PCI_DEVICE_ID_INTEL_KBL_GT3E_SULTM_1) ||
+ (igd_id == PCI_DEVICE_ID_INTEL_KBL_GT3E_SULTM_2)) {
+ const uint16_t icc_max_gt3[NUM_VR_DOMAINS] =
+ VR_CFG_ALL_DOMAINS_ICC(5.1, 32, 57, 19);
+
+ return icc_max_gt3[domain];
+ }
+
return icc_max[domain];
}
default:
--
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