From c54d14f5b45af0f64826c0a09eed3ab5740780ef Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Wed, 28 Nov 2018 12:09:23 +0100 Subject: cpu/intel/haswell: Rework acpi/cpu.asl Use acpigen_write_processor_cnot to implement notifications the CPU. Generate PPKG in SSDT. Change-Id: I126989e8737720f55f7ce113ff4e32bfe0f22620 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/29885 Reviewed-by: Duncan Laurie Tested-by: build bot (Jenkins) --- src/cpu/intel/haswell/acpi.c | 7 +++ src/cpu/intel/haswell/acpi/cpu.asl | 77 +++-------------------- src/mainboard/google/beltino/acpi/thermal.asl | 2 + src/mainboard/google/slippy/acpi/thermal.asl | 2 + src/mainboard/intel/baskingridge/acpi/thermal.asl | 2 + 5 files changed, 21 insertions(+), 69 deletions(-) (limited to 'src') diff --git a/src/cpu/intel/haswell/acpi.c b/src/cpu/intel/haswell/acpi.c index 40279bfb40..9dcd8ece1e 100644 --- a/src/cpu/intel/haswell/acpi.c +++ b/src/cpu/intel/haswell/acpi.c @@ -339,6 +339,13 @@ void generate_cpu_entries(struct device *device) acpigen_pop_len(); } } + + /* PPKG is usually used for thermal management + of the first and only package. */ + acpigen_write_processor_package("PPKG", 0, cores_per_package); + + /* Add a method to notify processor nodes */ + acpigen_write_processor_cnot(cores_per_package); } struct chip_operations cpu_intel_haswell_ops = { diff --git a/src/cpu/intel/haswell/acpi/cpu.asl b/src/cpu/intel/haswell/acpi/cpu.asl index a95c54a71c..6fad17f74e 100644 --- a/src/cpu/intel/haswell/acpi/cpu.asl +++ b/src/cpu/intel/haswell/acpi/cpu.asl @@ -14,84 +14,23 @@ * GNU General Public License for more details. */ -/* These devices are created at runtime */ -External (\_PR.CP00, DeviceObj) -External (\_PR.CP01, DeviceObj) -External (\_PR.CP02, DeviceObj) -External (\_PR.CP03, DeviceObj) -External (\_PR.CP04, DeviceObj) -External (\_PR.CP05, DeviceObj) -External (\_PR.CP06, DeviceObj) -External (\_PR.CP07, DeviceObj) +/* These come from the dynamically created CPU SSDT */ +External (\_PR.CNOT, MethodObj) -/* Notify OS to re-read CPU tables, assuming ^2 CPU count */ +/* Notify OS to re-read CPU tables */ Method (PNOT) { - If (LGreaterEqual (\PCNT, 2)) { - Notify (\_PR.CP00, 0x81) // _CST - Notify (\_PR.CP01, 0x81) // _CST - } - If (LGreaterEqual (\PCNT, 4)) { - Notify (\_PR.CP02, 0x81) // _CST - Notify (\_PR.CP03, 0x81) // _CST - } - If (LGreaterEqual (\PCNT, 8)) { - Notify (\_PR.CP04, 0x81) // _CST - Notify (\_PR.CP05, 0x81) // _CST - Notify (\_PR.CP06, 0x81) // _CST - Notify (\_PR.CP07, 0x81) // _CST - } + \_PR.CNOT (0x81) } -/* Notify OS to re-read CPU _PPC limit, assuming ^2 CPU count */ +/* Notify OS to re-read CPU _PPC limit */ Method (PPCN) { - If (LGreaterEqual (\PCNT, 2)) { - Notify (\_PR.CP00, 0x80) // _PPC - Notify (\_PR.CP01, 0x80) // _PPC - } - If (LGreaterEqual (\PCNT, 4)) { - Notify (\_PR.CP02, 0x80) // _PPC - Notify (\_PR.CP03, 0x80) // _PPC - } - If (LGreaterEqual (\PCNT, 8)) { - Notify (\_PR.CP04, 0x80) // _PPC - Notify (\_PR.CP05, 0x80) // _PPC - Notify (\_PR.CP06, 0x80) // _PPC - Notify (\_PR.CP07, 0x80) // _PPC - } + \_PR.CNOT (0x80) } -/* Notify OS to re-read Throttle Limit tables, assuming ^2 CPU count */ +/* Notify OS to re-read Throttle Limit tables */ Method (TNOT) { - If (LGreaterEqual (\PCNT, 2)) { - Notify (\_PR.CP00, 0x82) // _TPC - Notify (\_PR.CP01, 0x82) // _TPC - } - If (LGreaterEqual (\PCNT, 4)) { - Notify (\_PR.CP02, 0x82) // _TPC - Notify (\_PR.CP03, 0x82) // _TPC - } - If (LGreaterEqual (\PCNT, 8)) { - Notify (\_PR.CP04, 0x82) // _TPC - Notify (\_PR.CP05, 0x82) // _TPC - Notify (\_PR.CP06, 0x82) // _TPC - Notify (\_PR.CP07, 0x82) // _TPC - } -} - -/* Return a package containing enabled processor entries */ -Method (PPKG) -{ - If (LGreaterEqual (\PCNT, 8)) { - Return (Package() {\_PR.CP00, \_PR.CP01, \_PR.CP02, \_PR.CP03, - \_PR.CP04, \_PR.CP05, \_PR.CP06, \_PR.CP07}) - } ElseIf (LGreaterEqual (\PCNT, 4)) { - Return (Package() {\_PR.CP00, \_PR.CP01, \_PR.CP02, \_PR.CP03}) - } ElseIf (LGreaterEqual (\PCNT, 2)) { - Return (Package() {\_PR.CP00, \_PR.CP01}) - } Else { - Return (Package() {\_PR.CP00}) - } + \_PR.CNOT (0x82) } diff --git a/src/mainboard/google/beltino/acpi/thermal.asl b/src/mainboard/google/beltino/acpi/thermal.asl index 1d4eca3a09..a064121d73 100644 --- a/src/mainboard/google/beltino/acpi/thermal.asl +++ b/src/mainboard/google/beltino/acpi/thermal.asl @@ -13,6 +13,8 @@ * GNU General Public License for more details. */ +External (\PPKG, MethodObj) + #include // Thermal Zone diff --git a/src/mainboard/google/slippy/acpi/thermal.asl b/src/mainboard/google/slippy/acpi/thermal.asl index 0c694c0f70..ac4d61099b 100644 --- a/src/mainboard/google/slippy/acpi/thermal.asl +++ b/src/mainboard/google/slippy/acpi/thermal.asl @@ -15,6 +15,8 @@ // Thermal Zone +External (\PPKG, MethodObj) + #define HAVE_THERMALZONE Scope (\_TZ) { diff --git a/src/mainboard/intel/baskingridge/acpi/thermal.asl b/src/mainboard/intel/baskingridge/acpi/thermal.asl index 083ebcf309..0c2779e61b 100644 --- a/src/mainboard/intel/baskingridge/acpi/thermal.asl +++ b/src/mainboard/intel/baskingridge/acpi/thermal.asl @@ -15,6 +15,8 @@ // Thermal Zone +External (\PPKG, MethodObj) + Scope (\_TZ) { ThermalZone (THRM) -- cgit v1.2.3