From c5168832cd5e8a052e835cbbfa702f0d5649a98c Mon Sep 17 00:00:00 2001 From: Shelley Chen Date: Tue, 21 Mar 2017 15:04:04 -0700 Subject: google/fizz: Update device tree from schematic BUG=b:35775024 BRANCH=None TEST=Compiles successfully Change-Id: I92cf9baa4c3aefc6983511543d875e74a6b0bf94 Signed-off-by: Shelley Chen Reviewed-on: https://review.coreboot.org/18944 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh --- src/mainboard/google/fizz/devicetree.cb | 106 ++++++++++---------------------- 1 file changed, 34 insertions(+), 72 deletions(-) (limited to 'src') diff --git a/src/mainboard/google/fizz/devicetree.cb b/src/mainboard/google/fizz/devicetree.cb index fc639677fc..e498dc9012 100644 --- a/src/mainboard/google/fizz/devicetree.cb +++ b/src/mainboard/google/fizz/devicetree.cb @@ -19,16 +19,13 @@ chip soc/intel/skylake # EC memory map range is 0x900-0x9ff register "gen3_dec" = "0x00fc0901" - # Enable DPTF - register "dptf_enable" = "1" - # FSP Configuration register "ProbelessTrace" = "0" - register "EnableLan" = "0" - register "EnableSata" = "0" - register "SataSalpSupport" = "0" - register "SataMode" = "0" - register "SataPortsEnable[0]" = "0" + register "EnableLan" = "1" + register "EnableSata" = "1" + register "SataSalpSupport" = "1" + register "SataMode" = "1" + register "SataPortsEnable[0]" = "1" register "EnableAzalia" = "1" register "DspEnable" = "1" register "IoBufferOwnership" = "3" @@ -37,8 +34,8 @@ chip soc/intel/skylake register "SsicPortEnable" = "0" register "SmbusEnable" = "1" register "Cio2Enable" = "0" - register "ScsEmmcEnabled" = "1" - register "ScsEmmcHs400Enabled" = "1" + register "ScsEmmcEnabled" = "0" + register "ScsEmmcHs400Enabled" = "0" register "ScsSdCardEnabled" = "2" register "IshEnable" = "0" register "PttSwitch" = "0" @@ -138,23 +135,24 @@ chip soc/intel/skylake # RP 1 uses SRCCLKREQ1# register "PcieRpClkReqNumber[0]" = "1" - register "usb2_ports[0]" = "USB2_PORT_LONG(OC0)" # Type-C Port 1 - register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Port - register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth - register "usb2_ports[4]" = "USB2_PORT_LONG(OC1)" # Type-C Port 2 - register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Port - register "usb2_ports[8]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Port - - register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC0)" # Type-C Port 1 - register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC1)" # Type-C Port 2 - register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A Port - register "usb3_ports[3]" = "USB3_PORT_EMPTY" # Empty - - register "i2c_voltage[0]" = "I2C_VOLTAGE_3V3" # Touchscreen - register "i2c_voltage[1]" = "I2C_VOLTAGE_3V3" # NFC - register "i2c_voltage[2]" = "I2C_VOLTAGE_1V8" # Camera - register "i2c_voltage[3]" = "I2C_VOLTAGE_1V8" # Pen - register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" # Camera + register "usb2_ports[0]" = "USB2_PORT_LONG(OC0)" # Type-C + register "usb2_ports[1]" = "USB2_PORT_MID(OC3)" # Type-A Rear + register "usb2_ports[2]" = "USB2_PORT_MID(OC2)" # Type-A Front + register "usb2_ports[3]" = "USB2_PORT_MID(OC2)" # Type-A Front + register "usb2_ports[4]" = "USB2_PORT_MID(OC1)" # Type-A Rear + register "usb2_ports[5]" = "USB2_PORT_MID(OC1)" # Type-A Rear + register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth + register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Type-A 2.0 / Debug + register "usb2_ports[8]" = "USB2_PORT_EMPTY" # H1 (disconnected) + + register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC0)" # Type-C + register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC3)" # Type-A Rear + register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC2)" # Type-A Front + register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC2)" # Type-A Front + + register "i2c_voltage[0]" = "I2C_VOLTAGE_3V3" # HDMI CEC + register "i2c_voltage[1]" = "I2C_VOLTAGE_3V3" # TPM + register "i2c_voltage[2]" = "I2C_VOLTAGE_3V3" # Debug register "i2c_voltage[5]" = "I2C_VOLTAGE_1V8" # Audio # Must leave UART0 enabled or SD/eMMC will not work as PCI @@ -162,11 +160,11 @@ chip soc/intel/skylake [PchSerialIoIndexI2C0] = PchSerialIoPci, [PchSerialIoIndexI2C1] = PchSerialIoPci, [PchSerialIoIndexI2C2] = PchSerialIoPci, - [PchSerialIoIndexI2C3] = PchSerialIoPci, - [PchSerialIoIndexI2C4] = PchSerialIoPci, + [PchSerialIoIndexI2C3] = PchSerialIoDisabled, + [PchSerialIoIndexI2C4] = PchSerialIoDisabled, [PchSerialIoIndexI2C5] = PchSerialIoPci, [PchSerialIoIndexSpi0] = PchSerialIoPci, - [PchSerialIoIndexSpi1] = PchSerialIoPci, + [PchSerialIoIndexSpi1] = PchSerialIoDisabled, [PchSerialIoIndexUart0] = PchSerialIoPci, [PchSerialIoIndexUart1] = PchSerialIoDisabled, [PchSerialIoIndexUart2] = PchSerialIoSkipInit, @@ -177,7 +175,7 @@ chip soc/intel/skylake register "tcc_offset" = "10" # TCC of 90C # Use default SD card detect GPIO configuration - register "sdcard_cd_gpio_default" = "GPP_G7" + register "sdcard_cd_gpio_default" = "GPP_A7" device cpu_cluster 0 on device lapic 0 on end @@ -189,57 +187,21 @@ chip soc/intel/skylake device pci 14.1 off end # USB xDCI (OTG) device pci 14.2 on end # Thermal Subsystem device pci 15.0 on - chip drivers/i2c/generic - register "hid" = ""ATML0001"" - register "desc" = ""Atmel Touchscreen"" - register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_E7_IRQ)" - register "probed" = "1" - device i2c 4b on end - end end # I2C #0 device pci 15.1 on end # I2C #1 device pci 15.2 on end # I2C #2 - device pci 15.3 on - chip drivers/i2c/hid - register "generic.hid" = ""WCOM50C1"" - register "generic.desc" = ""WCOM Digitizer"" - register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_D1_IRQ)" - register "hid_desc_reg_offset" = "0x1" - device i2c 0x9 on end - end + device pci 15.3 off end # I2C #3 device pci 16.0 on end # Management Engine Interface 1 device pci 16.1 off end # Management Engine Interface 2 device pci 16.2 off end # Management Engine IDE-R device pci 16.3 off end # Management Engine KT Redirection device pci 16.4 off end # Management Engine Interface 3 - device pci 17.0 off end # SATA + device pci 17.0 on end # SATA device pci 19.0 on end # UART #2 device pci 19.1 on - chip drivers/i2c/max98927 - register "interleave_mode" = "1" - register "uid" = "0" - register "desc" = ""SSM4567 Right Speaker Amp"" - register "name" = ""MAXR"" - device i2c 39 on end - end - chip drivers/i2c/max98927 - register "interleave_mode" = "1" - register "uid" = "1" - register "desc" = ""SSM4567 Left Speaker Amp"" - register "name" = ""MAXL"" - device i2c 3A on end - end - chip drivers/i2c/generic - register "hid" = ""10EC5663"" - register "name" = ""RT53"" - register "desc" = ""Realtek RT5663"" - register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_D9)" - register "probed" = "1" - device i2c 13 on end - end end # I2C #5 - device pci 19.2 on end # I2C #4 + device pci 19.2 off end # I2C #4 device pci 1c.0 on chip drivers/intel/wifi register "wake" = "GPE0_PCI_EXP" @@ -260,8 +222,8 @@ chip soc/intel/skylake device pci 1e.0 on end # UART #0 device pci 1e.1 off end # UART #1 device pci 1e.2 on end # GSPI #0 - device pci 1e.3 on end # GSPI #1 - device pci 1e.4 on end # eMMC + device pci 1e.3 off end # GSPI #1 + device pci 1e.4 off end # eMMC device pci 1e.5 off end # SDIO device pci 1e.6 on end # SDCard device pci 1f.0 on -- cgit v1.2.3