From c3198543b690fbdeda0f1e1ffaf78048fe765ec0 Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Fri, 21 Jul 2017 10:08:25 +0530 Subject: soc/intel/skylake: Perform LPC offset read after lockdown operation This patch is to provide an additional read LPC pci offset register BIOS_CONTROL (BC) - offset 0xDC to ensure that the last write is successful. Change-Id: I308c0622d348fc96c410a04ab4081bb6af98e874 Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/20678 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/soc/intel/skylake/finalize.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'src') diff --git a/src/soc/intel/skylake/finalize.c b/src/soc/intel/skylake/finalize.c index 171d92e9cd..34f26eb8cb 100644 --- a/src/soc/intel/skylake/finalize.c +++ b/src/soc/intel/skylake/finalize.c @@ -185,6 +185,9 @@ static void soc_lockdown(void) pci_read_config8(PCH_DEV_LPC, BIOS_CNTL) | LPC_BC_LE); + /* Ensure an additional read back after performing lock down */ + pci_read_config8(PCH_DEV_LPC, BIOS_CNTL); + fast_spi_set_lock_enable(); } @@ -194,6 +197,9 @@ static void soc_lockdown(void) pci_read_config8(PCH_DEV_LPC, BIOS_CNTL) | LPC_BC_EISS); + /* Ensure an additional read back after performing lock down */ + pci_read_config8(PCH_DEV_LPC, BIOS_CNTL); + fast_spi_set_eiss(); } } -- cgit v1.2.3