From c2c1dc9c76c0d00374176e9a715ad12743dcfca3 Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Tue, 27 Nov 2018 09:31:27 +0100 Subject: {mb,nb,soc/fsp_baytrail}: Get rid of dump_mem() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Use hexdump() instead of dump_mem(). Change-Id: I7f6431bb2903a0d06f8ed0ada93aa3231a58eb6f Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/c/29853 Tested-by: build bot (Jenkins) Reviewed-by: David Guckian Reviewed-by: Kyösti Mälkki --- src/mainboard/amd/mahogany_fam10/romstage.c | 2 -- src/mainboard/asus/m4a78-em/romstage.c | 2 -- src/mainboard/asus/m4a785-m/romstage.c | 2 -- src/mainboard/asus/m5a88-v/romstage.c | 2 -- src/mainboard/gigabyte/ma785gm/romstage.c | 2 -- src/mainboard/gigabyte/ma785gmt/romstage.c | 2 -- src/mainboard/iei/kino-780am2-fam10/romstage.c | 2 -- src/mainboard/jetway/pa78vm5/romstage.c | 2 -- src/mainboard/supermicro/h8scm_fam10/romstage.c | 2 -- src/northbridge/amd/amdfam10/debug.c | 13 ------------- src/northbridge/amd/amdfam10/debug.h | 1 - src/northbridge/intel/e7505/debug.c | 12 ------------ src/northbridge/intel/e7505/debug.h | 1 - src/northbridge/intel/fsp_rangeley/northbridge.h | 1 - src/northbridge/intel/haswell/haswell.h | 1 - src/northbridge/intel/i945/debug.c | 12 ------------ src/northbridge/intel/i945/i945.h | 1 - src/northbridge/intel/nehalem/nehalem.h | 1 - src/northbridge/intel/sandybridge/sandybridge.h | 1 - src/soc/intel/fsp_baytrail/include/soc/baytrail.h | 1 - 20 files changed, 63 deletions(-) (limited to 'src') diff --git a/src/mainboard/amd/mahogany_fam10/romstage.c b/src/mainboard/amd/mahogany_fam10/romstage.c index c9fc9ec7ae..056f840042 100644 --- a/src/mainboard/amd/mahogany_fam10/romstage.c +++ b/src/mainboard/amd/mahogany_fam10/romstage.c @@ -100,8 +100,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) console_init(); -// dump_mem(CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x200, CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE); - /* Halt if there was a built in self test failure */ report_bist_failure(bist); diff --git a/src/mainboard/asus/m4a78-em/romstage.c b/src/mainboard/asus/m4a78-em/romstage.c index 788907a23e..e93f2dd540 100644 --- a/src/mainboard/asus/m4a78-em/romstage.c +++ b/src/mainboard/asus/m4a78-em/romstage.c @@ -100,8 +100,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) console_init(); -// dump_mem(CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x200, CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE); - /* Halt if there was a built in self test failure */ report_bist_failure(bist); diff --git a/src/mainboard/asus/m4a785-m/romstage.c b/src/mainboard/asus/m4a785-m/romstage.c index 5cc970766c..1bf4e7809a 100644 --- a/src/mainboard/asus/m4a785-m/romstage.c +++ b/src/mainboard/asus/m4a785-m/romstage.c @@ -101,8 +101,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) console_init(); -// dump_mem(CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x200, CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE); - /* Halt if there was a built in self test failure */ report_bist_failure(bist); diff --git a/src/mainboard/asus/m5a88-v/romstage.c b/src/mainboard/asus/m5a88-v/romstage.c index 6b03ffdbc6..5c36727594 100644 --- a/src/mainboard/asus/m5a88-v/romstage.c +++ b/src/mainboard/asus/m5a88-v/romstage.c @@ -104,8 +104,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) console_init(); printk(BIOS_DEBUG, "\n"); -// dump_mem(CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x200, CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE); - /* Halt if there was a built in self test failure */ report_bist_failure(bist); diff --git a/src/mainboard/gigabyte/ma785gm/romstage.c b/src/mainboard/gigabyte/ma785gm/romstage.c index 1bb3c64c77..9f77635e06 100644 --- a/src/mainboard/gigabyte/ma785gm/romstage.c +++ b/src/mainboard/gigabyte/ma785gm/romstage.c @@ -96,8 +96,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) it8718f_disable_reboot(GPIO_DEV); console_init(); -// dump_mem(CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x200, CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE); - /* Halt if there was a built in self test failure */ report_bist_failure(bist); diff --git a/src/mainboard/gigabyte/ma785gmt/romstage.c b/src/mainboard/gigabyte/ma785gmt/romstage.c index 11dd190580..f60884594a 100644 --- a/src/mainboard/gigabyte/ma785gmt/romstage.c +++ b/src/mainboard/gigabyte/ma785gmt/romstage.c @@ -96,8 +96,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) it8718f_disable_reboot(GPIO_DEV); console_init(); -// dump_mem(CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x200, CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE); - /* Halt if there was a built in self test failure */ report_bist_failure(bist); diff --git a/src/mainboard/iei/kino-780am2-fam10/romstage.c b/src/mainboard/iei/kino-780am2-fam10/romstage.c index d42e90b77d..3167bf312c 100644 --- a/src/mainboard/iei/kino-780am2-fam10/romstage.c +++ b/src/mainboard/iei/kino-780am2-fam10/romstage.c @@ -98,8 +98,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) console_init(); -// dump_mem(CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x200, CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE); - /* Halt if there was a built in self test failure */ report_bist_failure(bist); diff --git a/src/mainboard/jetway/pa78vm5/romstage.c b/src/mainboard/jetway/pa78vm5/romstage.c index 9c4183e358..7737625ecb 100644 --- a/src/mainboard/jetway/pa78vm5/romstage.c +++ b/src/mainboard/jetway/pa78vm5/romstage.c @@ -103,8 +103,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) console_init(); -// dump_mem(CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x200, CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE); - /* Halt if there was a built in self test failure */ report_bist_failure(bist); diff --git a/src/mainboard/supermicro/h8scm_fam10/romstage.c b/src/mainboard/supermicro/h8scm_fam10/romstage.c index 8508189cc4..db5147f34f 100644 --- a/src/mainboard/supermicro/h8scm_fam10/romstage.c +++ b/src/mainboard/supermicro/h8scm_fam10/romstage.c @@ -110,8 +110,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) console_init(); -// dump_mem(CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x200, CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE); - /* Halt if there was a built in self test failure */ report_bist_failure(bist); diff --git a/src/northbridge/amd/amdfam10/debug.c b/src/northbridge/amd/amdfam10/debug.c index 067c299fbe..55a00e1e7a 100644 --- a/src/northbridge/amd/amdfam10/debug.c +++ b/src/northbridge/amd/amdfam10/debug.c @@ -299,19 +299,6 @@ void dump_io_resources(u32 port) } } -void dump_mem(u32 start, u32 end) -{ - u32 i; - printk(BIOS_DEBUG, "dump_mem:"); - for (i = start; i < end; i++) { - if ((i & 0xf) == 0) { - printk(BIOS_DEBUG, "\n%08x:", i); - } - printk(BIOS_DEBUG, " %02x", (u8)*((u8 *)i)); - } - printk(BIOS_DEBUG, "\n"); -} - #if IS_ENABLED(CONFIG_DIMM_DDR2) void print_tx(const char *strval, u32 val) { diff --git a/src/northbridge/amd/amdfam10/debug.h b/src/northbridge/amd/amdfam10/debug.h index a4ecfe98f8..a23303ebfa 100644 --- a/src/northbridge/amd/amdfam10/debug.h +++ b/src/northbridge/amd/amdfam10/debug.h @@ -38,7 +38,6 @@ void dump_smbus_registers(void); #endif void dump_io_resources(u32 port); -void dump_mem(u32 start, u32 end); void print_tx(const char *strval, u32 val); void print_t(const char *strval); diff --git a/src/northbridge/intel/e7505/debug.c b/src/northbridge/intel/e7505/debug.c index f3a27e2b73..c21e321de4 100644 --- a/src/northbridge/intel/e7505/debug.c +++ b/src/northbridge/intel/e7505/debug.c @@ -183,15 +183,3 @@ void dump_io_resources(unsigned port) port++; } } - -void dump_mem(unsigned start, unsigned end) -{ - unsigned i; - printk(BIOS_DEBUG, "dump_mem:"); - for (i = start; i < end; i++) { - if ((i & 0xf)==0) - printk(BIOS_DEBUG, "\n%08x:", i); - printk(BIOS_DEBUG, " %02x", (unsigned char)*((unsigned char *)i)); - } - printk(BIOS_DEBUG, "\n"); -} diff --git a/src/northbridge/intel/e7505/debug.h b/src/northbridge/intel/e7505/debug.h index 238c500995..98ca848ea0 100644 --- a/src/northbridge/intel/e7505/debug.h +++ b/src/northbridge/intel/e7505/debug.h @@ -22,6 +22,5 @@ void dump_pci_devices_on_bus(unsigned busn); void dump_spd_registers(const struct mem_controller *ctrl); void dump_smbus_registers(void); void dump_io_resources(unsigned port); -void dump_mem(unsigned start, unsigned end); #endif diff --git a/src/northbridge/intel/fsp_rangeley/northbridge.h b/src/northbridge/intel/fsp_rangeley/northbridge.h index f68d175a59..11089a5764 100644 --- a/src/northbridge/intel/fsp_rangeley/northbridge.h +++ b/src/northbridge/intel/fsp_rangeley/northbridge.h @@ -69,7 +69,6 @@ void print_pci_devices(void); void dump_pci_device(unsigned dev); void dump_pci_devices(void); void dump_spd_registers(void); -void dump_mem(unsigned start, unsigned end); void report_platform_info(void); #ifndef __SIMPLE_DEVICE__ diff --git a/src/northbridge/intel/haswell/haswell.h b/src/northbridge/intel/haswell/haswell.h index f67995d4e9..9125764844 100644 --- a/src/northbridge/intel/haswell/haswell.h +++ b/src/northbridge/intel/haswell/haswell.h @@ -228,7 +228,6 @@ void print_pci_devices(void); void dump_pci_device(unsigned dev); void dump_pci_devices(void); void dump_spd_registers(void); -void dump_mem(unsigned start, unsigned end); void report_platform_info(void); #endif /* !__SMM__ */ diff --git a/src/northbridge/intel/i945/debug.c b/src/northbridge/intel/i945/debug.c index ef4f17bc6d..c52f2a67e8 100644 --- a/src/northbridge/intel/i945/debug.c +++ b/src/northbridge/intel/i945/debug.c @@ -96,15 +96,3 @@ void dump_spd_registers(void) printk(BIOS_DEBUG, "\n"); } } - -void dump_mem(unsigned int start, unsigned int end) -{ - unsigned int i; - printk(BIOS_DEBUG, "dump_mem:"); - for (i = start; i < end; i++) { - if ((i & 0xf) == 0) - printk(BIOS_DEBUG, "\n%08x:", i); - printk(BIOS_DEBUG, " %02x", (unsigned char)*((unsigned char *)i)); - } - printk(BIOS_DEBUG, "\n"); -} diff --git a/src/northbridge/intel/i945/i945.h b/src/northbridge/intel/i945/i945.h index 65a40e7268..757eb52617 100644 --- a/src/northbridge/intel/i945/i945.h +++ b/src/northbridge/intel/i945/i945.h @@ -379,7 +379,6 @@ void print_pci_devices(void); void dump_pci_device(unsigned int dev); void dump_pci_devices(void); void dump_spd_registers(void); -void dump_mem(unsigned int start, unsigned int end); u32 decode_igd_memory_size(u32 gms); u32 decode_tseg_size(const u8 esmramc); diff --git a/src/northbridge/intel/nehalem/nehalem.h b/src/northbridge/intel/nehalem/nehalem.h index 5756c9039d..b0e849020c 100644 --- a/src/northbridge/intel/nehalem/nehalem.h +++ b/src/northbridge/intel/nehalem/nehalem.h @@ -277,7 +277,6 @@ void print_pci_devices(void); void dump_pci_device(unsigned dev); void dump_pci_devices(void); void dump_spd_registers(void); -void dump_mem(unsigned start, unsigned end); void report_platform_info(void); #endif /* !__SMM__ */ diff --git a/src/northbridge/intel/sandybridge/sandybridge.h b/src/northbridge/intel/sandybridge/sandybridge.h index faa9cd905d..9e3da4bede 100644 --- a/src/northbridge/intel/sandybridge/sandybridge.h +++ b/src/northbridge/intel/sandybridge/sandybridge.h @@ -219,7 +219,6 @@ void print_pci_devices(void); void dump_pci_device(unsigned dev); void dump_pci_devices(void); void dump_spd_registers(void); -void dump_mem(unsigned start, unsigned end); #endif /* !__SMM__ */ diff --git a/src/soc/intel/fsp_baytrail/include/soc/baytrail.h b/src/soc/intel/fsp_baytrail/include/soc/baytrail.h index 82fd0a1c2f..68bdd12cbf 100644 --- a/src/soc/intel/fsp_baytrail/include/soc/baytrail.h +++ b/src/soc/intel/fsp_baytrail/include/soc/baytrail.h @@ -63,7 +63,6 @@ void print_pci_devices(void); void dump_pci_device(unsigned dev); void dump_pci_devices(void); void dump_spd_registers(void); -void dump_mem(unsigned start, unsigned end); void report_platform_info(void); #endif /* __PRE_RAM__ */ -- cgit v1.2.3