From c024c14790244becc5fee9cb122848128689b181 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Sat, 27 Mar 2021 12:15:08 +0100 Subject: nb/intel/x4x: Correct sync DLL phase search Bit 4 needs to be set then polled for after changing sync DLL taps. Change-Id: I61b73998dec84710eec0d2561a6f4d88068e3373 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/51872 Reviewed-by: Nico Huber Tested-by: build bot (Jenkins) --- src/northbridge/intel/x4x/raminit_ddr23.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src') diff --git a/src/northbridge/intel/x4x/raminit_ddr23.c b/src/northbridge/intel/x4x/raminit_ddr23.c index 2389b5f899..1bfeaad5b0 100644 --- a/src/northbridge/intel/x4x/raminit_ddr23.c +++ b/src/northbridge/intel/x4x/raminit_ddr23.c @@ -862,7 +862,7 @@ static void program_dll(struct sysinfo *s) i++; for (; i < 16; i++) { MCHBAR8_AND_OR(0x1c8, ~0x1f, i); - MCHBAR8_OR(0x180, 0x4); + MCHBAR8_OR(0x180, 0x10); while (MCHBAR8(0x180) & 0x10) ; if (MCHBAR32(0x184) == 0) { -- cgit v1.2.3