From bfc255a12146a364f0d08ee9818af715a485a579 Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Sat, 7 Mar 2020 13:05:14 +0100 Subject: src/sb: Use 'print("%s...", __func__)' Change-Id: Ie0d845d3e501ed5ebeef1997944445d31768e410 Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/c/coreboot/+/39373 Reviewed-by: Angel Pons Tested-by: build bot (Jenkins) --- src/southbridge/amd/agesa/hudson/hudson.c | 2 +- src/southbridge/amd/agesa/hudson/smi.c | 2 +- src/southbridge/amd/cimx/sb800/late.c | 4 ++-- src/southbridge/amd/cimx/sb800/lpc.c | 12 +++++------ src/southbridge/amd/cimx/sb800/smbus.c | 36 +++++++++++++++---------------- src/southbridge/amd/pi/hudson/hudson.c | 2 +- src/southbridge/amd/pi/hudson/smi.c | 2 +- src/southbridge/intel/bd82x6x/lpc.c | 4 ++-- src/southbridge/intel/i82801gx/lpc.c | 2 +- src/southbridge/intel/i82801ix/lpc.c | 2 +- src/southbridge/intel/i82801jx/lpc.c | 2 +- src/southbridge/intel/i82870/ioapic.c | 4 ++-- src/southbridge/intel/ibexpeak/lpc.c | 2 +- src/southbridge/intel/lynxpoint/lpc.c | 2 +- 14 files changed, 39 insertions(+), 39 deletions(-) (limited to 'src') diff --git a/src/southbridge/amd/agesa/hudson/hudson.c b/src/southbridge/amd/agesa/hudson/hudson.c index 3f04987328..3609314f4e 100644 --- a/src/southbridge/amd/agesa/hudson/hudson.c +++ b/src/southbridge/amd/agesa/hudson/hudson.c @@ -39,7 +39,7 @@ static void hudson_disable_usb(u8 disable) void hudson_enable(struct device *dev) { - printk(BIOS_DEBUG, "hudson_enable()\n"); + printk(BIOS_DEBUG, "%s()\n", __func__); switch (dev->path.pci.devfn) { case PCI_DEVFN(0x14, 5): if (dev->enabled == 0) { diff --git a/src/southbridge/amd/agesa/hudson/smi.c b/src/southbridge/amd/agesa/hudson/smi.c index 567a3f89fc..9e6db341fd 100644 --- a/src/southbridge/amd/agesa/hudson/smi.c +++ b/src/southbridge/amd/agesa/hudson/smi.c @@ -12,7 +12,7 @@ void smm_setup_structures(void *gnvs, void *tcg, void *smi1) { - printk(BIOS_DEBUG, "smm_setup_structures STUB!!!\n"); + printk(BIOS_DEBUG, "%s STUB!!!\n", __func__); } /** Set the EOS bit and enable SMI generation from southbridge */ diff --git a/src/southbridge/amd/cimx/sb800/late.c b/src/southbridge/amd/cimx/sb800/late.c index cf84b2140c..1cf3ae8d00 100644 --- a/src/southbridge/amd/cimx/sb800/late.c +++ b/src/southbridge/amd/cimx/sb800/late.c @@ -108,7 +108,7 @@ static struct pci_operations lops_pci = { static void lpc_init(struct device *dev) { - printk(BIOS_DEBUG, "SB800 - Late.c - lpc_init - Start.\n"); + printk(BIOS_DEBUG, "SB800 - Late.c - %s - Start.\n", __func__); cmos_check_update_date(); @@ -122,7 +122,7 @@ static void lpc_init(struct device *dev) setup_i8259(); /* Initialize i8259 pic */ setup_i8254(); /* Initialize i8254 timers */ - printk(BIOS_DEBUG, "SB800 - Late.c - lpc_init - End.\n"); + printk(BIOS_DEBUG, "SB800 - Late.c - %s - End.\n", __func__); } unsigned long acpi_fill_mcfg(unsigned long current) diff --git a/src/southbridge/amd/cimx/sb800/lpc.c b/src/southbridge/amd/cimx/sb800/lpc.c index 9517d95031..a082e0ca5a 100644 --- a/src/southbridge/amd/cimx/sb800/lpc.c +++ b/src/southbridge/amd/cimx/sb800/lpc.c @@ -11,7 +11,7 @@ void lpc_read_resources(struct device *dev) { struct resource *res; - printk(BIOS_DEBUG, "SB800 - Lpc.c - lpc_read_resources - Start.\n"); + printk(BIOS_DEBUG, "SB800 - Lpc.c - %s - Start.\n", __func__); /* Get the normal pci resources of this device */ pci_dev_read_resources(dev); /* We got one for APIC, or one more for TRAP */ @@ -37,14 +37,14 @@ void lpc_read_resources(struct device *dev) res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; compact_resources(dev); - printk(BIOS_DEBUG, "SB800 - Lpc.c - lpc_read_resources - End.\n"); + printk(BIOS_DEBUG, "SB800 - Lpc.c - %s - End.\n", __func__); } void lpc_set_resources(struct device *dev) { struct resource *res; - printk(BIOS_DEBUG, "SB800 - Lpc.c - lpc_set_resources - Start.\n"); + printk(BIOS_DEBUG, "SB800 - Lpc.c - %s - Start.\n", __func__); /* Special case. SPI Base Address. The SpiRomEnable should STAY set. */ res = find_resource(dev, 2); @@ -52,7 +52,7 @@ void lpc_set_resources(struct device *dev) pci_dev_set_resources(dev); - printk(BIOS_DEBUG, "SB800 - Lpc.c - lpc_set_resources - End.\n"); + printk(BIOS_DEBUG, "SB800 - Lpc.c - %s - End.\n", __func__); } /** @@ -68,7 +68,7 @@ void lpc_enable_childrens_resources(struct device *dev) int var_num = 0; u16 reg_var[3]; - printk(BIOS_DEBUG, "SB800 - Lpc.c - lpc_enable_childrens_resources - Start.\n"); + printk(BIOS_DEBUG, "SB800 - Lpc.c - %s - Start.\n", __func__); reg = pci_read_config32(dev, 0x44); reg_x = pci_read_config32(dev, 0x48); @@ -166,5 +166,5 @@ void lpc_enable_childrens_resources(struct device *dev) //pci_write_config16(dev, 0x64, reg_var[0]); //cause filo can not find sata break; } - printk(BIOS_DEBUG, "SB800 - Lpc.c - lpc_enable_childrens_resources - End.\n"); + printk(BIOS_DEBUG, "SB800 - Lpc.c - %s - End.\n", __func__); } diff --git a/src/southbridge/amd/cimx/sb800/smbus.c b/src/southbridge/amd/cimx/sb800/smbus.c index bc9d92119a..86bde267ff 100644 --- a/src/southbridge/amd/cimx/sb800/smbus.c +++ b/src/southbridge/amd/cimx/sb800/smbus.c @@ -50,11 +50,11 @@ int do_smbus_recv_byte(u32 smbus_io_base, u32 device) u8 byte; if (smbus_wait_until_ready(smbus_io_base) < 0) { - printk(BIOS_DEBUG, "SB800 - Smbus.c - do_smbus_recv_byte - smbus not ready.\n"); + printk(BIOS_DEBUG, "SB800 - Smbus.c - %s - smbus not ready.\n", __func__); return -2; /* not ready */ } - printk(BIOS_DEBUG, "SB800 - Smbus.c - do_smbus_recv_byte - Start.\n"); + printk(BIOS_DEBUG, "SB800 - Smbus.c - %s - Start.\n", __func__); /* set the device I'm talking to */ outb(((device & 0x7f) << 1) | 1, smbus_io_base + SMBHSTADDR); @@ -71,7 +71,7 @@ int do_smbus_recv_byte(u32 smbus_io_base, u32 device) /* read results of transaction */ byte = inb(smbus_io_base + SMBHSTCMD); - printk(BIOS_DEBUG, "SB800 - Smbus.c - do_smbus_recv_byte - End.\n"); + printk(BIOS_DEBUG, "SB800 - Smbus.c - %s - End.\n", __func__); return byte; } @@ -80,11 +80,11 @@ int do_smbus_send_byte(u32 smbus_io_base, u32 device, u8 val) u8 byte; if (smbus_wait_until_ready(smbus_io_base) < 0) { - printk(BIOS_DEBUG, "SB800 - Smbus.c - do_smbus_send_byte - smbus not ready.\n"); + printk(BIOS_DEBUG, "SB800 - Smbus.c - %s - smbus not ready.\n", __func__); return -2; /* not ready */ } - printk(BIOS_DEBUG, "SB800 - Smbus.c - do_smbus_send_byte - Start.\n"); + printk(BIOS_DEBUG, "SB800 - Smbus.c - %s - Start.\n", __func__); /* set the command... */ outb(val, smbus_io_base + SMBHSTCMD); @@ -101,7 +101,7 @@ int do_smbus_send_byte(u32 smbus_io_base, u32 device, u8 val) return -3; /* timeout or error */ } - printk(BIOS_DEBUG, "SB800 - Smbus.c - do_smbus_send_byte - End.\n"); + printk(BIOS_DEBUG, "SB800 - Smbus.c - %s - End.\n", __func__); return 0; } @@ -110,11 +110,11 @@ int do_smbus_read_byte(u32 smbus_io_base, u32 device, u32 address) u8 byte; if (smbus_wait_until_ready(smbus_io_base) < 0) { - printk(BIOS_DEBUG, "SB800 - Smbus.c - do_smbus_read_byte - smbus not ready.\n"); + printk(BIOS_DEBUG, "SB800 - Smbus.c - %s - smbus not ready.\n", __func__); return -2; /* not ready */ } - printk(BIOS_DEBUG, "SB800 - Smbus.c - do_smbus_read_byte - Start.\n"); + printk(BIOS_DEBUG, "SB800 - Smbus.c - %s - Start.\n", __func__); /* set the command/address... */ outb(address & 0xff, smbus_io_base + SMBHSTCMD); @@ -134,7 +134,7 @@ int do_smbus_read_byte(u32 smbus_io_base, u32 device, u32 address) /* read results of transaction */ byte = inb(smbus_io_base + SMBHSTDAT0); - printk(BIOS_DEBUG, "SB800 - Smbus.c - do_smbus_read_byte - End.\n"); + printk(BIOS_DEBUG, "SB800 - Smbus.c - %s - End.\n", __func__); return byte; } @@ -143,11 +143,11 @@ int do_smbus_write_byte(u32 smbus_io_base, u32 device, u32 address, u8 val) u8 byte; if (smbus_wait_until_ready(smbus_io_base) < 0) { - printk(BIOS_DEBUG, "SB800 - Smbus.c - do_smbus_write_byte - smbus not ready.\n"); + printk(BIOS_DEBUG, "SB800 - Smbus.c - %s - smbus not ready.\n", __func__); return -2; /* not ready */ } - printk(BIOS_DEBUG, "SB800 - Smbus.c - do_smbus_write_byte - Start.\n"); + printk(BIOS_DEBUG, "SB800 - Smbus.c - %s - Start.\n", __func__); /* set the command/address... */ outb(address & 0xff, smbus_io_base + SMBHSTCMD); @@ -167,7 +167,7 @@ int do_smbus_write_byte(u32 smbus_io_base, u32 device, u32 address, u8 val) return -3; /* timeout or error */ } - printk(BIOS_DEBUG, "SB800 - Smbus.c - do_smbus_write_byte - End.\n"); + printk(BIOS_DEBUG, "SB800 - Smbus.c - %s - End.\n", __func__); return 0; } @@ -175,7 +175,7 @@ void alink_ab_indx(u32 reg_space, u32 reg_addr, u32 mask, u32 val) { u32 tmp; - printk(BIOS_DEBUG, "SB800 - Smbus.c - alink_ab_indx - Start.\n"); + printk(BIOS_DEBUG, "SB800 - Smbus.c - %s - Start.\n", __func__); outl((reg_space & 0x7) << 29 | reg_addr, AB_INDX); tmp = inl(AB_DATA); /* rpr 4.2 @@ -191,14 +191,14 @@ void alink_ab_indx(u32 reg_space, u32 reg_addr, u32 mask, u32 val) outl((reg_space & 0x7) << 29 | reg_addr, AB_INDX); /* probably we don't have to do it again. */ outl(tmp, AB_DATA); outl(0, AB_INDX); - printk(BIOS_DEBUG, "SB800 - Smbus.c - alink_ab_indx - End.\n"); + printk(BIOS_DEBUG, "SB800 - Smbus.c - %s - End.\n", __func__); } void alink_rc_indx(u32 reg_space, u32 reg_addr, u32 port, u32 mask, u32 val) { u32 tmp; - printk(BIOS_DEBUG, "SB800 - Smbus.c - alink_rc_indx - Start.\n"); + printk(BIOS_DEBUG, "SB800 - Smbus.c - %s - Start.\n", __func__); outl((reg_space & 0x7) << 29 | (port & 3) << 24 | reg_addr, AB_INDX); tmp = inl(AB_DATA); /* rpr 4.2 @@ -214,7 +214,7 @@ void alink_rc_indx(u32 reg_space, u32 reg_addr, u32 port, u32 mask, u32 val) outl((reg_space & 0x7) << 29 | (port & 3) << 24 | reg_addr, AB_INDX); /* probably we don't have to do it again. */ outl(tmp, AB_DATA); outl(0, AB_INDX); - printk(BIOS_DEBUG, "SB800 - Smbus.c - alink_rc_indx - End.\n"); + printk(BIOS_DEBUG, "SB800 - Smbus.c - %s - End.\n", __func__); } /* space = 0: AX_INDXC, AX_DATAC @@ -224,7 +224,7 @@ void alink_ax_indx(u32 space /*c or p? */, u32 axindc, u32 mask, u32 val) { u32 tmp; - printk(BIOS_DEBUG, "SB800 - Smbus.c - alink_ax_indx - Start.\n"); + printk(BIOS_DEBUG, "SB800 - Smbus.c - %s - Start.\n", __func__); /* read axindc to tmp */ outl(space << 29 | space << 3 | 0x30, AB_INDX); outl(axindc, AB_DATA); @@ -243,5 +243,5 @@ void alink_ax_indx(u32 space /*c or p? */, u32 axindc, u32 mask, u32 val) outl(space << 29 | space << 3 | 0x34, AB_INDX); outl(tmp, AB_DATA); outl(0, AB_INDX); - printk(BIOS_DEBUG, "SB800 - Smbus.c - alink_ax_indx - End.\n"); + printk(BIOS_DEBUG, "SB800 - Smbus.c - %s - End.\n", __func__); } diff --git a/src/southbridge/amd/pi/hudson/hudson.c b/src/southbridge/amd/pi/hudson/hudson.c index 63fe473afb..852144b2db 100644 --- a/src/southbridge/amd/pi/hudson/hudson.c +++ b/src/southbridge/amd/pi/hudson/hudson.c @@ -26,7 +26,7 @@ int acpi_get_sleep_type(void) void hudson_enable(struct device *dev) { - printk(BIOS_DEBUG, "hudson_enable()\n"); + printk(BIOS_DEBUG, "%s()\n", __func__); switch (dev->path.pci.devfn) { case PCI_DEVFN(0x14, 7): /* SD */ if (dev->enabled == 0) { diff --git a/src/southbridge/amd/pi/hudson/smi.c b/src/southbridge/amd/pi/hudson/smi.c index 567a3f89fc..9e6db341fd 100644 --- a/src/southbridge/amd/pi/hudson/smi.c +++ b/src/southbridge/amd/pi/hudson/smi.c @@ -12,7 +12,7 @@ void smm_setup_structures(void *gnvs, void *tcg, void *smi1) { - printk(BIOS_DEBUG, "smm_setup_structures STUB!!!\n"); + printk(BIOS_DEBUG, "%s STUB!!!\n", __func__); } /** Set the EOS bit and enable SMI generation from southbridge */ diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c index 0341de2fdc..987db360e2 100644 --- a/src/southbridge/intel/bd82x6x/lpc.c +++ b/src/southbridge/intel/bd82x6x/lpc.c @@ -446,7 +446,7 @@ static void pch_spi_init(const struct device *const dev) { const config_t *const config = dev->chip_info; - printk(BIOS_DEBUG, "pch_spi_init\n"); + printk(BIOS_DEBUG, "%s\n", __func__); if (config->spi_uvscc) RCBA32(0x3800 + 0xc8) = config->spi_uvscc; @@ -526,7 +526,7 @@ static void report_pch_info(struct device *dev) static void lpc_init(struct device *dev) { - printk(BIOS_DEBUG, "pch: lpc_init\n"); + printk(BIOS_DEBUG, "pch: %s\n", __func__); /* Print detected platform */ report_pch_info(dev); diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c index b69dba49e5..7e2b5a7ca6 100644 --- a/src/southbridge/intel/i82801gx/lpc.c +++ b/src/southbridge/intel/i82801gx/lpc.c @@ -354,7 +354,7 @@ static void i82801gx_fixups(struct device *dev) static void lpc_init(struct device *dev) { - printk(BIOS_DEBUG, "i82801gx: lpc_init\n"); + printk(BIOS_DEBUG, "i82801gx: %s\n", __func__); /* Set the value for PCI command register. */ pci_write_config16(dev, PCI_COMMAND, 0x000f); diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c index 455e3b816c..37f9852c64 100644 --- a/src/southbridge/intel/i82801ix/lpc.c +++ b/src/southbridge/intel/i82801ix/lpc.c @@ -366,7 +366,7 @@ static void i82801ix_set_acpi_mode(struct device *dev) static void lpc_init(struct device *dev) { - printk(BIOS_DEBUG, "i82801ix: lpc_init\n"); + printk(BIOS_DEBUG, "i82801ix: %s\n", __func__); /* Set the value for PCI command register. */ pci_write_config16(dev, PCI_COMMAND, 0x000f); diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c index 73eaede288..ae98fddc2a 100644 --- a/src/southbridge/intel/i82801jx/lpc.c +++ b/src/southbridge/intel/i82801jx/lpc.c @@ -371,7 +371,7 @@ static void i82801jx_set_acpi_mode(struct device *dev) static void lpc_init(struct device *dev) { - printk(BIOS_DEBUG, "i82801jx: lpc_init\n"); + printk(BIOS_DEBUG, "i82801jx: %s\n", __func__); /* Set the value for PCI command register. */ pci_write_config16(dev, PCI_COMMAND, 0x000f); diff --git a/src/southbridge/intel/i82870/ioapic.c b/src/southbridge/intel/i82870/ioapic.c index 6be212f75c..4763703644 100644 --- a/src/southbridge/intel/i82870/ioapic.c +++ b/src/southbridge/intel/i82870/ioapic.c @@ -72,13 +72,13 @@ static void p64h2_ioapic_init(struct device *dev) *pWindowRegister = (*pWindowRegister & ~(0x0f << 24)) | apic_id; // Set the ID if ((*pWindowRegister & (0x0f << 24)) != apic_id) - die("p64h2_ioapic_init failed"); + die("%s failed", __func__); *pIndexRegister = 3; // Select Boot Configuration register *pWindowRegister |= 1; // Use Processor System Bus to deliver interrupts if (!(*pWindowRegister & 1)) - die("p64h2_ioapic_init failed"); + die("%s failed", __func__); } static struct device_operations ioapic_ops = { diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c index f1fa0d22d3..0d15b5d8fa 100644 --- a/src/southbridge/intel/ibexpeak/lpc.c +++ b/src/southbridge/intel/ibexpeak/lpc.c @@ -441,7 +441,7 @@ static void pch_fixups(struct device *dev) static void lpc_init(struct device *dev) { - printk(BIOS_DEBUG, "pch: lpc_init\n"); + printk(BIOS_DEBUG, "pch: %s\n", __func__); /* Set the value for PCI command register. */ pci_write_config16(dev, PCI_COMMAND, 0x000f); diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c index 3535312779..7e1355a7d5 100644 --- a/src/southbridge/intel/lynxpoint/lpc.c +++ b/src/southbridge/intel/lynxpoint/lpc.c @@ -509,7 +509,7 @@ static void pch_fixups(struct device *dev) static void lpc_init(struct device *dev) { - printk(BIOS_DEBUG, "pch: lpc_init\n"); + printk(BIOS_DEBUG, "pch: %s\n", __func__); /* Set the value for PCI command register. */ pci_write_config16(dev, PCI_COMMAND, 0x000f); -- cgit v1.2.3