From beee666ad330106ae7e428e16961535621ff1453 Mon Sep 17 00:00:00 2001 From: Michael Niewöhner Date: Mon, 21 Dec 2020 03:46:58 +0100 Subject: mb/intel/icelake_rvp: do UART pad config at board-level MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit UART pad configuration should not be done in common code, because that may cause short circuits, when the user sets a wrong UART index. Thus, add the corresponding pads to the early UART gpio table for the board as a first step. Common UART pad config code then gets dropped in CB:48829. Also switch to `bootblock_mainboard_early_init` to configure the pads in early bootblock before console initialization, to make the console work as early as possible. The board does not do any other gpio configuration in bootblock, so this should not influence behaviour in a negative way (e.g. breaking overrides). Change-Id: Ib19a4f64eaf25bf2eb47ee60748a68538fc0729a Signed-off-by: Michael Niewöhner Reviewed-on: https://review.coreboot.org/c/coreboot/+/49430 Reviewed-by: Angel Pons Tested-by: build bot (Jenkins) --- src/mainboard/intel/icelake_rvp/bootblock.c | 2 +- src/mainboard/intel/icelake_rvp/variants/icl_u/gpio.c | 4 ++++ src/mainboard/intel/icelake_rvp/variants/icl_y/gpio.c | 4 ++++ 3 files changed, 9 insertions(+), 1 deletion(-) (limited to 'src') diff --git a/src/mainboard/intel/icelake_rvp/bootblock.c b/src/mainboard/intel/icelake_rvp/bootblock.c index a8f7e41433..d7f3255974 100644 --- a/src/mainboard/intel/icelake_rvp/bootblock.c +++ b/src/mainboard/intel/icelake_rvp/bootblock.c @@ -5,7 +5,7 @@ #include #include -void bootblock_mainboard_init(void) +void bootblock_mainboard_early_init(void) { const struct pad_config *pads; size_t num; diff --git a/src/mainboard/intel/icelake_rvp/variants/icl_u/gpio.c b/src/mainboard/intel/icelake_rvp/variants/icl_u/gpio.c index 286753a820..30e249c22e 100644 --- a/src/mainboard/intel/icelake_rvp/variants/icl_u/gpio.c +++ b/src/mainboard/intel/icelake_rvp/variants/icl_u/gpio.c @@ -86,6 +86,10 @@ PAD_CFG_GPO(GPP_H0, 1, DEEP), /* Early pad configuration in bootblock */ static const struct pad_config early_gpio_table[] = { + /* UART2 RX */ + PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1), + /* UART2 TX */ + PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1), }; const struct pad_config *variant_gpio_table(size_t *num) diff --git a/src/mainboard/intel/icelake_rvp/variants/icl_y/gpio.c b/src/mainboard/intel/icelake_rvp/variants/icl_y/gpio.c index 286753a820..30e249c22e 100644 --- a/src/mainboard/intel/icelake_rvp/variants/icl_y/gpio.c +++ b/src/mainboard/intel/icelake_rvp/variants/icl_y/gpio.c @@ -86,6 +86,10 @@ PAD_CFG_GPO(GPP_H0, 1, DEEP), /* Early pad configuration in bootblock */ static const struct pad_config early_gpio_table[] = { + /* UART2 RX */ + PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1), + /* UART2 TX */ + PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1), }; const struct pad_config *variant_gpio_table(size_t *num) -- cgit v1.2.3