From bdcda710a7e4bc439408eedaf3e66145c6831c90 Mon Sep 17 00:00:00 2001 From: Furquan Shaikh Date: Sun, 19 Jun 2016 23:20:08 -0700 Subject: intel/apollolake: Add helper routine for spi reg read BUG=chrome-os-partner:54563 Change-Id: I56bc6b5292aec676103a436048abee8577edd961 Signed-off-by: Furquan Shaikh Reviewed-on: https://review.coreboot.org/15268 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/soc/intel/apollolake/include/soc/spi.h | 2 ++ src/soc/intel/apollolake/spi.c | 6 ++++++ 2 files changed, 8 insertions(+) (limited to 'src') diff --git a/src/soc/intel/apollolake/include/soc/spi.h b/src/soc/intel/apollolake/include/soc/spi.h index 1414a84686..f67110f125 100644 --- a/src/soc/intel/apollolake/include/soc/spi.h +++ b/src/soc/intel/apollolake/include/soc/spi.h @@ -75,4 +75,6 @@ */ int spi_read_status(uint8_t *status); +/* Read SPI controller register. */ +uint32_t spi_ctrlr_reg_read(uint16_t reg); #endif diff --git a/src/soc/intel/apollolake/spi.c b/src/soc/intel/apollolake/spi.c index 879b3a34a9..282ed013a6 100644 --- a/src/soc/intel/apollolake/spi.c +++ b/src/soc/intel/apollolake/spi.c @@ -70,6 +70,12 @@ static uint32_t _spi_ctrlr_reg_read(struct spi_ctx *ctx, uint16_t reg) return read32((void *)addr); } +uint32_t spi_ctrlr_reg_read(uint16_t reg) +{ + BOILERPLATE_CREATE_CTX(ctx); + return _spi_ctrlr_reg_read(ctx, reg); +} + /* Write to register in the SPI controller. 'reg' is the register offset. */ static void _spi_ctrlr_reg_write(struct spi_ctx *ctx, uint16_t reg, uint32_t val) -- cgit v1.2.3