From ba35f3582e95fdc3d9313a63d6ee0072283f5c7f Mon Sep 17 00:00:00 2001 From: Felix Held Date: Tue, 18 Oct 2022 20:43:00 +0200 Subject: soc/amd: move all AOAC function prototypes to amdblocks/aoac.h Signed-off-by: Felix Held Change-Id: I3deae150cd1e20fff6507a0f0ba6a375fca430e5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68559 Tested-by: build bot (Jenkins) Reviewed-by: Fred Reitberger --- src/soc/amd/cezanne/early_fch.c | 1 + src/soc/amd/cezanne/include/soc/southbridge.h | 3 --- src/soc/amd/common/block/include/amdblocks/aoac.h | 3 +++ src/soc/amd/common/psp_verstage/fch.c | 1 + src/soc/amd/mendocino/early_fch.c | 1 + src/soc/amd/mendocino/include/soc/southbridge.h | 3 --- src/soc/amd/morgana/early_fch.c | 1 + src/soc/amd/morgana/include/soc/southbridge.h | 3 --- src/soc/amd/picasso/early_fch.c | 1 + src/soc/amd/picasso/include/soc/southbridge.h | 3 --- src/soc/amd/stoneyridge/early_fch.c | 1 + src/soc/amd/stoneyridge/include/soc/southbridge.h | 1 - 12 files changed, 9 insertions(+), 13 deletions(-) (limited to 'src') diff --git a/src/soc/amd/cezanne/early_fch.c b/src/soc/amd/cezanne/early_fch.c index 4935f661db..0b8e9a0161 100644 --- a/src/soc/amd/cezanne/early_fch.c +++ b/src/soc/amd/cezanne/early_fch.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include +#include #include #include #include diff --git a/src/soc/amd/cezanne/include/soc/southbridge.h b/src/soc/amd/cezanne/include/soc/southbridge.h index 4e44b89fe4..4cd53cb5d1 100644 --- a/src/soc/amd/cezanne/include/soc/southbridge.h +++ b/src/soc/amd/cezanne/include/soc/southbridge.h @@ -118,7 +118,4 @@ void fch_early_init(void); void fch_init(void *chip_info); void fch_final(void *chip_info); -void enable_aoac_devices(void); -void wait_for_aoac_enabled(unsigned int dev); - #endif /* AMD_CEZANNE_SOUTHBRIDGE_H */ diff --git a/src/soc/amd/common/block/include/amdblocks/aoac.h b/src/soc/amd/common/block/include/amdblocks/aoac.h index 455f32d9e6..3944e2e584 100644 --- a/src/soc/amd/common/block/include/amdblocks/aoac.h +++ b/src/soc/amd/common/block/include/amdblocks/aoac.h @@ -35,5 +35,8 @@ bool is_aoac_device_enabled(unsigned int dev); void power_on_aoac_device(unsigned int dev); void power_off_aoac_device(unsigned int dev); +/* the following 2 functions are implemented in the SoC code */ +void enable_aoac_devices(void); +void wait_for_aoac_enabled(unsigned int dev); #endif /* AMD_BLOCK_AOAC_H */ diff --git a/src/soc/amd/common/psp_verstage/fch.c b/src/soc/amd/common/psp_verstage/fch.c index d4dcd21b31..7f850fd149 100644 --- a/src/soc/amd/common/psp_verstage/fch.c +++ b/src/soc/amd/common/psp_verstage/fch.c @@ -3,6 +3,7 @@ #include "psp_verstage.h" #include +#include #include #include #include diff --git a/src/soc/amd/mendocino/early_fch.c b/src/soc/amd/mendocino/early_fch.c index 333173717e..a1cf908a4d 100644 --- a/src/soc/amd/mendocino/early_fch.c +++ b/src/soc/amd/mendocino/early_fch.c @@ -3,6 +3,7 @@ /* TODO: Check if this is still correct */ #include +#include #include #include #include diff --git a/src/soc/amd/mendocino/include/soc/southbridge.h b/src/soc/amd/mendocino/include/soc/southbridge.h index a5a1be4780..52c2606a1d 100644 --- a/src/soc/amd/mendocino/include/soc/southbridge.h +++ b/src/soc/amd/mendocino/include/soc/southbridge.h @@ -121,7 +121,4 @@ void fch_early_init(void); void fch_init(void *chip_info); void fch_final(void *chip_info); -void enable_aoac_devices(void); -void wait_for_aoac_enabled(unsigned int dev); - #endif /* AMD_MENDOCINO_SOUTHBRIDGE_H */ diff --git a/src/soc/amd/morgana/early_fch.c b/src/soc/amd/morgana/early_fch.c index 1ec71051fa..f940deaf3b 100644 --- a/src/soc/amd/morgana/early_fch.c +++ b/src/soc/amd/morgana/early_fch.c @@ -3,6 +3,7 @@ /* TODO: Update for Morgana */ #include +#include #include #include #include diff --git a/src/soc/amd/morgana/include/soc/southbridge.h b/src/soc/amd/morgana/include/soc/southbridge.h index 75f0beb72f..216bf42677 100644 --- a/src/soc/amd/morgana/include/soc/southbridge.h +++ b/src/soc/amd/morgana/include/soc/southbridge.h @@ -121,7 +121,4 @@ void fch_early_init(void); void fch_init(void *chip_info); void fch_final(void *chip_info); -void enable_aoac_devices(void); -void wait_for_aoac_enabled(unsigned int dev); - #endif /* AMD_MORGANA_SOUTHBRIDGE_H */ diff --git a/src/soc/amd/picasso/early_fch.c b/src/soc/amd/picasso/early_fch.c index f5d392c9f6..e77f2963fd 100644 --- a/src/soc/amd/picasso/early_fch.c +++ b/src/soc/amd/picasso/early_fch.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include +#include #include #include #include diff --git a/src/soc/amd/picasso/include/soc/southbridge.h b/src/soc/amd/picasso/include/soc/southbridge.h index b8dd67b5c7..a3fb1a2d7d 100644 --- a/src/soc/amd/picasso/include/soc/southbridge.h +++ b/src/soc/amd/picasso/include/soc/southbridge.h @@ -107,7 +107,4 @@ void fch_early_init(void); void fch_init(void *chip_info); void fch_final(void *chip_info); -void enable_aoac_devices(void); -void wait_for_aoac_enabled(unsigned int dev); - #endif /* AMD_PICASSO_SOUTHBRIDGE_H */ diff --git a/src/soc/amd/stoneyridge/early_fch.c b/src/soc/amd/stoneyridge/early_fch.c index 763e3f2901..5e2be614e0 100644 --- a/src/soc/amd/stoneyridge/early_fch.c +++ b/src/soc/amd/stoneyridge/early_fch.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include +#include #include #include #include diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h index 32c102c50f..26500efd04 100644 --- a/src/soc/amd/stoneyridge/include/soc/southbridge.h +++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h @@ -181,7 +181,6 @@ void bootblock_fch_init(void); void fch_init(void *chip_info); void fch_final(void *chip_info); -void enable_aoac_devices(void); void fch_clk_output_48Mhz(u32 osc); void set_uart_config(unsigned int idx); -- cgit v1.2.3