From b8f05d4faab11a7b726963dc3821a682281eea02 Mon Sep 17 00:00:00 2001 From: Edward O'Callaghan Date: Sun, 4 Jan 2015 16:17:54 +1100 Subject: superio/nsc/pc87417: Use link-time symbols over .c inclusion MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I2efb7ab4b69bcd127b2faf54277dc229c9dcf3ea Signed-off-by: Edward O'Callaghan Reviewed-on: http://review.coreboot.org/8078 Reviewed-by: Kyösti Mälkki Tested-by: build bot (Jenkins) --- src/mainboard/broadcom/blast/romstage.c | 2 +- src/mainboard/hp/dl145_g3/romstage.c | 2 +- src/mainboard/hp/dl165_g6_fam10/romstage.c | 2 +- src/mainboard/msi/ms9185/romstage.c | 2 +- src/superio/nsc/pc87417/Makefile.inc | 2 ++ src/superio/nsc/pc87417/early_init.c | 12 ++++++------ src/superio/nsc/pc87417/early_serial.c | 8 ++------ src/superio/nsc/pc87417/pc87417.h | 14 +++++++++----- src/superio/nsc/pc87417/superio.c | 1 - 9 files changed, 23 insertions(+), 22 deletions(-) (limited to 'src') diff --git a/src/mainboard/broadcom/blast/romstage.c b/src/mainboard/broadcom/blast/romstage.c index 03cdc1dc80..a97c3b88fc 100644 --- a/src/mainboard/broadcom/blast/romstage.c +++ b/src/mainboard/broadcom/blast/romstage.c @@ -14,7 +14,7 @@ #include "cpu/x86/lapic.h" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" -#include "superio/nsc/pc87417/early_serial.c" +#include #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/setup_resource_map.c" #include "southbridge/broadcom/bcm5785/early_setup.c" diff --git a/src/mainboard/hp/dl145_g3/romstage.c b/src/mainboard/hp/dl145_g3/romstage.c index 9deaabae0a..474f273781 100644 --- a/src/mainboard/hp/dl145_g3/romstage.c +++ b/src/mainboard/hp/dl145_g3/romstage.c @@ -41,7 +41,7 @@ #include "cpu/x86/lapic.h" #include "northbridge/amd/amdk8/reset_test.c" #include -#include "superio/nsc/pc87417/early_serial.c" +#include #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/debug.c" #include "northbridge/amd/amdk8/setup_resource_map.c" diff --git a/src/mainboard/hp/dl165_g6_fam10/romstage.c b/src/mainboard/hp/dl165_g6_fam10/romstage.c index a2269a6f96..9e103603d8 100644 --- a/src/mainboard/hp/dl165_g6_fam10/romstage.c +++ b/src/mainboard/hp/dl165_g6_fam10/romstage.c @@ -47,7 +47,7 @@ #include "cpu/x86/lapic.h" #include "northbridge/amd/amdfam10/reset_test.c" #include -#include "superio/nsc/pc87417/early_serial.c" +#include #include "cpu/x86/bist.h" #include "northbridge/amd/amdfam10/debug.c" #include "southbridge/broadcom/bcm5785/early_setup.c" diff --git a/src/mainboard/msi/ms9185/romstage.c b/src/mainboard/msi/ms9185/romstage.c index aabc826836..bd8243650a 100644 --- a/src/mainboard/msi/ms9185/romstage.c +++ b/src/mainboard/msi/ms9185/romstage.c @@ -40,7 +40,7 @@ #include "cpu/x86/lapic.h" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" -#include "superio/nsc/pc87417/early_serial.c" +#include #include "cpu/x86/bist.h" #include "northbridge/amd/amdk8/setup_resource_map.c" #include "southbridge/broadcom/bcm5785/early_setup.c" diff --git a/src/superio/nsc/pc87417/Makefile.inc b/src/superio/nsc/pc87417/Makefile.inc index 8062a79315..58d4eb56d4 100644 --- a/src/superio/nsc/pc87417/Makefile.inc +++ b/src/superio/nsc/pc87417/Makefile.inc @@ -20,4 +20,6 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## +romstage-$(CONFIG_SUPERIO_NSC_PC87417) += early_init.c +romstage-$(CONFIG_SUPERIO_NSC_PC87417) += early_serial.c ramstage-$(CONFIG_SUPERIO_NSC_PC87417) += superio.c diff --git a/src/superio/nsc/pc87417/early_init.c b/src/superio/nsc/pc87417/early_init.c index 42f8cd15c8..4e6b76cd3a 100644 --- a/src/superio/nsc/pc87417/early_init.c +++ b/src/superio/nsc/pc87417/early_init.c @@ -21,25 +21,25 @@ */ #include +#include +#include #include "pc87417.h" -static void pc87417_disable_dev(pnp_devfn_t dev) +void pc87417_disable_dev(pnp_devfn_t dev) { pnp_set_logical_device(dev); pnp_set_enable(dev, 0); } -static void pc87417_enable_dev(pnp_devfn_t dev, u16 iobase) +void pc87417_enable_dev(pnp_devfn_t dev) { pnp_set_logical_device(dev); - pnp_set_enable(dev, 0); - pnp_set_iobase(dev, PNP_IDX_IO0, iobase); pnp_set_enable(dev, 1); } -static void xbus_cfg(pnp_devfn_t dev) +void xbus_cfg(pnp_devfn_t dev) { - u8 i, data; + u8 i; u16 xbus_index; pnp_set_logical_device(dev); diff --git a/src/superio/nsc/pc87417/early_serial.c b/src/superio/nsc/pc87417/early_serial.c index 42ba941cb7..69a7739f2b 100644 --- a/src/superio/nsc/pc87417/early_serial.c +++ b/src/superio/nsc/pc87417/early_serial.c @@ -21,6 +21,8 @@ */ #include +#include +#include #include "pc87417.h" void pc87417_enable_serial(pnp_devfn_t dev, u16 iobase) @@ -30,9 +32,3 @@ void pc87417_enable_serial(pnp_devfn_t dev, u16 iobase) pnp_set_iobase(dev, PNP_IDX_IO0, iobase); pnp_set_enable(dev, 1); } - -void pc87417_enable_dev(pnp_devfn_t dev) -{ - pnp_set_logical_device(dev); - pnp_set_enable(dev, 1); -} diff --git a/src/superio/nsc/pc87417/pc87417.h b/src/superio/nsc/pc87417/pc87417.h index e7d5413cc7..2e369cf9ce 100644 --- a/src/superio/nsc/pc87417/pc87417.h +++ b/src/superio/nsc/pc87417/pc87417.h @@ -20,8 +20,8 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#ifndef SUPERIO_NSC_PC87417_PC87417_H -#define SUPERIO_NSC_PC87417_PC87417_H +#ifndef SUPERIO_NSC_PC87417_H +#define SUPERIO_NSC_PC87417_H #define PC87417_FDC 0x00 /* Floppy */ #define PC87417_PP 0x01 /* Parallel Port */ @@ -114,9 +114,13 @@ #define PC87417_XSCNF 0x15 #define PC87417_XWBCNF 0x16 -#if defined(__PRE_RAM__) +#include +#include + void pc87417_enable_serial(pnp_devfn_t dev, u16 iobase); +void pc87417_disable_dev(pnp_devfn_t dev); void pc87417_enable_dev(pnp_devfn_t dev); -#endif -#endif +void xbus_cfg(pnp_devfn_t dev); + +#endif /* SUPERIO_NSC_PC87417_H */ diff --git a/src/superio/nsc/pc87417/superio.c b/src/superio/nsc/pc87417/superio.c index 2295f29f61..15bd0eab03 100644 --- a/src/superio/nsc/pc87417/superio.c +++ b/src/superio/nsc/pc87417/superio.c @@ -31,7 +31,6 @@ static void init(struct device *dev) { - if (!dev->enabled) return; -- cgit v1.2.3