From b78c09ee7d3f81c4bb9fc367e9d9ef92faf33079 Mon Sep 17 00:00:00 2001
From: Jamie Chen <jamie_chen@compal.corp-partner.google.com>
Date: Tue, 7 Mar 2023 17:30:48 +0800
Subject: mb/google/brya/var/omnigul: Fix SSD can not boot into OS

1. device ref pcie_rp11 -> pcie_rp9 on.

BUG=b:270657362
TEST=FW_NAME=omnigul emerge-brya coreboot

Change-Id: If23785f42466ba94f33d4d15dde96de29dbb3a1e
Signed-off-by: Jamie Chen <jamie_chen@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73530
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/mainboard/google/brya/variants/omnigul/overridetree.cb | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

(limited to 'src')

diff --git a/src/mainboard/google/brya/variants/omnigul/overridetree.cb b/src/mainboard/google/brya/variants/omnigul/overridetree.cb
index 4ee874d710..0fff8bace0 100644
--- a/src/mainboard/google/brya/variants/omnigul/overridetree.cb
+++ b/src/mainboard/google/brya/variants/omnigul/overridetree.cb
@@ -161,8 +161,9 @@ chip soc/intel/alderlake
 			end
 		end #I2C5
 		device ref pcie_rp8 off end
-		device ref pcie_rp11 on
-			register "pch_pcie_rp[PCH_RP(11)]" = "{
+		device ref pcie_rp9 on
+			# Enable NVMe PCIE 9 using clk 1
+			register "pch_pcie_rp[PCH_RP(9)]" = "{
 				.clk_src = 1,
 				.clk_req = 1,
 				.flags = PCIE_RP_LTR | PCIE_RP_AER,
-- 
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