From b19de28c9889675125183f350e2a35f60e142562 Mon Sep 17 00:00:00 2001 From: Kevin Chiu Date: Thu, 16 May 2019 11:16:18 +0800 Subject: mb/google/octopus: Create Garg variant This commit creates a garg variant for Octopus. The initial settings override the baseboard was copied from variant bobba. BUG=b:132668378 BRANCH=master TEST=emerge-octopus coreboot Change-Id: I9a36bc5dc3d2b891b1bce86015aa264894d1434b Signed-off-by: Kevin Chiu Reviewed-on: https://review.coreboot.org/c/coreboot/+/32835 Tested-by: build bot (Jenkins) Reviewed-by: Sheng-Liang Pan Reviewed-by: Justin TerAvest --- src/mainboard/google/octopus/Kconfig | 3 + src/mainboard/google/octopus/Kconfig.name | 6 + .../google/octopus/variants/garg/Makefile.inc | 3 + src/mainboard/google/octopus/variants/garg/gpio.c | 37 +++++ .../variants/garg/include/variant/acpi/dptf.asl | 16 ++ .../octopus/variants/garg/include/variant/ec.h | 24 +++ .../octopus/variants/garg/include/variant/gpio.h | 21 +++ .../google/octopus/variants/garg/overridetree.cb | 180 +++++++++++++++++++++ 8 files changed, 290 insertions(+) create mode 100644 src/mainboard/google/octopus/variants/garg/Makefile.inc create mode 100644 src/mainboard/google/octopus/variants/garg/gpio.c create mode 100644 src/mainboard/google/octopus/variants/garg/include/variant/acpi/dptf.asl create mode 100644 src/mainboard/google/octopus/variants/garg/include/variant/ec.h create mode 100644 src/mainboard/google/octopus/variants/garg/include/variant/gpio.h create mode 100644 src/mainboard/google/octopus/variants/garg/overridetree.cb (limited to 'src') diff --git a/src/mainboard/google/octopus/Kconfig b/src/mainboard/google/octopus/Kconfig index 9c0a2f771e..48753ed4b1 100644 --- a/src/mainboard/google/octopus/Kconfig +++ b/src/mainboard/google/octopus/Kconfig @@ -59,6 +59,7 @@ config VARIANT_DIR default "casta" if BOARD_GOOGLE_CASTA default "bloog" if BOARD_GOOGLE_BLOOG default "octopus" if BOARD_GOOGLE_OCTOPUS + default "garg" if BOARD_GOOGLE_GARG config DEVICETREE string @@ -79,6 +80,7 @@ config MAINBOARD_PART_NUMBER default "Casta" if BOARD_GOOGLE_CASTA default "Bloog" if BOARD_GOOGLE_BLOOG default "Octopus" if BOARD_GOOGLE_OCTOPUS + default "Garg" if BOARD_GOOGLE_GARG config MAINBOARD_FAMILY string @@ -96,6 +98,7 @@ config GBB_HWID default "CASTA TEST 8105" if BOARD_GOOGLE_CASTA default "BLOOG TEST 2509" if BOARD_GOOGLE_BLOOG default "OCTOPUS TEST 6859" if BOARD_GOOGLE_OCTOPUS + default "GARG TEST 1337" if BOARD_GOOGLE_GARG config MAX_CPUS int diff --git a/src/mainboard/google/octopus/Kconfig.name b/src/mainboard/google/octopus/Kconfig.name index e5684e0268..b192134fb4 100644 --- a/src/mainboard/google/octopus/Kconfig.name +++ b/src/mainboard/google/octopus/Kconfig.name @@ -52,3 +52,9 @@ config BOARD_GOOGLE_BLOOG select BASEBOARD_OCTOPUS_LAPTOP select BOARD_GOOGLE_BASEBOARD_OCTOPUS select NHLT_DA7219 if INCLUDE_NHLT_BLOBS + +config BOARD_GOOGLE_GARG + bool "-> Garg" + select BASEBOARD_OCTOPUS_LAPTOP + select BOARD_GOOGLE_BASEBOARD_OCTOPUS + select NHLT_DA7219 if INCLUDE_NHLT_BLOBS diff --git a/src/mainboard/google/octopus/variants/garg/Makefile.inc b/src/mainboard/google/octopus/variants/garg/Makefile.inc new file mode 100644 index 0000000000..9fb63f5f43 --- /dev/null +++ b/src/mainboard/google/octopus/variants/garg/Makefile.inc @@ -0,0 +1,3 @@ +bootblock-y += gpio.c + +ramstage-y += gpio.c diff --git a/src/mainboard/google/octopus/variants/garg/gpio.c b/src/mainboard/google/octopus/variants/garg/gpio.c new file mode 100644 index 0000000000..a4362409b5 --- /dev/null +++ b/src/mainboard/google/octopus/variants/garg/gpio.c @@ -0,0 +1,37 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2019 Google LLC + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include + +static const struct pad_config default_override_table[] = { + PAD_NC(GPIO_104, UP_20K), + + /* EN_PP3300_TOUCHSCREEN */ + PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_146, 0, DEEP, NONE, Tx0RxDCRx0, + DISPUPD), + + PAD_NC(GPIO_213, DN_20K), +}; + +const struct pad_config *variant_override_gpio_table(size_t *num) +{ + *num = ARRAY_SIZE(default_override_table); + + return default_override_table; +} diff --git a/src/mainboard/google/octopus/variants/garg/include/variant/acpi/dptf.asl b/src/mainboard/google/octopus/variants/garg/include/variant/acpi/dptf.asl new file mode 100644 index 0000000000..4f6497ab2d --- /dev/null +++ b/src/mainboard/google/octopus/variants/garg/include/variant/acpi/dptf.asl @@ -0,0 +1,16 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2019 Google LLC + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include diff --git a/src/mainboard/google/octopus/variants/garg/include/variant/ec.h b/src/mainboard/google/octopus/variants/garg/include/variant/ec.h new file mode 100644 index 0000000000..feb6c71655 --- /dev/null +++ b/src/mainboard/google/octopus/variants/garg/include/variant/ec.h @@ -0,0 +1,24 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2019 Google LLC + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef MAINBOARD_EC_H +#define MAINBOARD_EC_H + +#include + +/* Enable EC backed Keyboard Backlight in ACPI */ +#define EC_ENABLE_KEYBOARD_BACKLIGHT + +#endif diff --git a/src/mainboard/google/octopus/variants/garg/include/variant/gpio.h b/src/mainboard/google/octopus/variants/garg/include/variant/gpio.h new file mode 100644 index 0000000000..750b0d4ccc --- /dev/null +++ b/src/mainboard/google/octopus/variants/garg/include/variant/gpio.h @@ -0,0 +1,21 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2019 Google LLC + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the + * GNU General Public License for more details. + */ + +#ifndef MAINBOARD_GPIO_H +#define MAINBOARD_GPIO_H + +#include + +#endif /* MAINBOARD_GPIO_H */ diff --git a/src/mainboard/google/octopus/variants/garg/overridetree.cb b/src/mainboard/google/octopus/variants/garg/overridetree.cb new file mode 100644 index 0000000000..0230a29a89 --- /dev/null +++ b/src/mainboard/google/octopus/variants/garg/overridetree.cb @@ -0,0 +1,180 @@ +chip soc/intel/apollolake + + # EMMC Tx CMD Delay + # Refer to EDS-Vol2-16.32. + # [14:8] steps of delay for DDR mode, each 125ps. + # [6:0] steps of delay for SDR mode, each 125ps. + register "emmc_tx_cmd_cntl" = "0x505" + + # EMMC TX DATA Delay 1 + # Refer to EDS-Vol2-16.33. + # [14:8] steps of delay for HS400, each 125ps. + # [6:0] steps of delay for SDR104/HS200, each 125ps. + register "emmc_tx_data_cntl1" = "0x0a0b" + + # EMMC TX DATA Delay 2 + # Refer to EDS-Vol2-16.34. + # [30:24] steps of delay for SDR50, each 125ps. + # [22:16] steps of delay for DDR50, each 125ps. + # [14:8] steps of delay for SDR25/HS50, each 125ps. + # [6:0] steps of delay for SDR12, each 125ps. + register "emmc_tx_data_cntl2" = "0x1c272828" + + # EMMC RX CMD/DATA Delay 1 + # Refer to EDS-Vol2-16.35. + # [30:24] steps of delay for SDR50, each 125ps. + # [22:16] steps of delay for DDR50, each 125ps. + # [14:8] steps of delay for SDR25/HS50, each 125ps. + # [6:0] steps of delay for SDR12, each 125ps. + register "emmc_rx_cmd_data_cntl1" = "0x00181b1a" + + # EMMC RX CMD/DATA Delay 2 + # Refer to EDS-Vol2-16.37. + # [17:16] stands for Rx Clock before Output Buffer + # [14:8] steps of delay for Auto Tuning Mode, each 125ps. + # [6:0] steps of delay for HS200, each 125ps. + register "emmc_rx_cmd_data_cntl2" = "0x10021" + + # EMMC Rx Strobe Delay + # Refer to EDS-Vol2-16.36. + # [14:8] Rx Strobe Delay DLL 1(HS400 Mode), each 125ps. + # [6:0] Rx Strobe Delay DLL 2(HS400 Mode), each 125ps. + register "emmc_rx_strobe_cntl" = "0x0a0a" + + # Intel Common SoC Config + #+-------------------+---------------------------+ + #| Field | Value | + #+-------------------+---------------------------+ + #| GSPI0 | cr50 TPM. Early init is | + #| | required to set up a BAR | + #| | for TPM communication | + #| | before memory is up | + #| I2C0 | Digitizer | + #| I2C5 | Audio | + #| I2C6 | Trackpad | + #| I2C7 | Touchscreen | + #+-------------------+---------------------------+ + + register "tcc_offset" = "10" + + register "common_soc_config" = "{ + .gspi[0] = { + .speed_mhz = 1, + .early_init = 1, + }, + .i2c[0] = { + .speed = I2C_SPEED_FAST, + .rise_time_ns = 88, + .fall_time_ns = 16, + }, + .i2c[5] = { + .speed = I2C_SPEED_FAST, + .rise_time_ns = 104, + .fall_time_ns = 52, + }, + .i2c[6] = { + .speed = I2C_SPEED_FAST, + .rise_time_ns = 66, + .fall_time_ns = 90, + .data_hold_time_ns = 350, + }, + .i2c[7] = { + .speed = I2C_SPEED_FAST, + .rise_time_ns = 44, + .fall_time_ns = 90, + }, + }" + + device domain 0 on + device pci 16.0 on + chip drivers/i2c/hid + register "generic.hid" = ""WCOM50C1"" + register "generic.desc" = ""WCOM Digitizer"" + register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPIO_139_IRQ)" + register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_140)" + register "generic.reset_delay_ms" = "20" + register "generic.has_power_resource" = "1" + register "hid_desc_reg_offset" = "0x1" + device i2c 0x9 on end + end + chip drivers/generic/gpio_keys + register "name" = ""PENH"" + register "gpio" = "ACPI_GPIO_INPUT_ACTIVE_LOW(GPIO_145)" + register "key.dev_name" = ""EJCT"" + register "key.linux_code" = "SW_PEN_INSERTED" + register "key.linux_input_type" = "EV_SW" + register "key.label" = ""pen_eject"" + register "key.wake" = "GPE0_DW2_04" + register "key.wakeup_event_action" = "EV_ACT_DEASSERTED" + device generic 0 on end + end + end # - I2C 0 + device pci 17.1 on + chip drivers/i2c/da7219 + register "irq" = "ACPI_IRQ_LEVEL_LOW(GPIO_137_IRQ)" + register "btn_cfg" = "50" + register "mic_det_thr" = "500" + register "jack_ins_deb" = "20" + register "jack_det_rate" = ""32ms_64ms"" + register "jack_rem_deb" = "1" + register "a_d_btn_thr" = "0xa" + register "d_b_btn_thr" = "0x16" + register "b_c_btn_thr" = "0x21" + register "c_mic_btn_thr" = "0x3e" + register "btn_avg" = "4" + register "adc_1bit_rpt" = "1" + register "micbias_lvl" = "2600" + register "mic_amp_in_sel" = ""diff"" + device i2c 1a on end + end + end # - I2C 5 + device pci 17.2 on + chip drivers/i2c/generic + register "hid" = ""ELAN0000"" + register "desc" = ""ELAN Touchpad"" + register "irq" = "ACPI_IRQ_WAKE_EDGE_LOW(GPIO_135_IRQ)" + register "wake" = "GPE0_DW3_27" + register "probed" = "1" + device i2c 15 on end + end + chip drivers/i2c/hid + register "generic.hid" = ""PNP0C50"" + register "generic.desc" = ""Synaptics Touchpad"" + register "generic.irq" = "ACPI_IRQ_WAKE_EDGE_LOW(GPIO_135_IRQ)" + register "generic.wake" = "GPE0_DW3_27" + register "generic.probed" = "1" + register "hid_desc_reg_offset" = "0x20" + device i2c 0x2c on end + end + end # - I2C 6 + device pci 17.3 on + chip drivers/i2c/generic + register "hid" = ""ELAN0001"" + register "desc" = ""ELAN Touchscreen"" + register "irq" = "ACPI_IRQ_EDGE_LOW(GPIO_212_IRQ)" + register "probed" = "1" + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_105)" + register "reset_delay_ms" = "20" + register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_146)" + register "enable_delay_ms" = "1" + register "has_power_resource" = "1" + device i2c 10 on end + end + chip drivers/i2c/generic + register "hid" = ""RAYD0001"" + register "desc" = ""Raydium Touchscreen"" + register "irq" = "ACPI_IRQ_EDGE_LOW(GPIO_212_IRQ)" + register "probed" = "1" + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_105)" + register "reset_delay_ms" = "1" + register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_146)" + register "enable_delay_ms" = "50" + register "has_power_resource" = "1" + device i2c 39 on end + end + end # - I2C 7 + end + + # Disable compliance mode + register "DisableComplianceMode" = "1" +end -- cgit v1.2.3