From b1197af7f5aa18b17160f0c5fba9869482891cd2 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Wed, 2 Mar 2022 23:02:31 +0100 Subject: soc/amd/*/northbridge,root_complex: simplify GNB IOAPIC resource index In the northbridge's and root complex' read_resources function, the GNB IOAPIC resource used MMIO base address of the GNB IOAPIC as index which might be misleading. Instead use idx++ as a unique index for this resource. TEST=Resource allocator doesn't complain and no related warnings or errors in dmesg. The update_constraints console output changes like expected: Before: PCI: 00:00.0 fec01000 base fec01000 limit fec01fff mem (fixed) After: PCI: 00:00.0 0d base fec01000 limit fec01fff mem (fixed) Signed-off-by: Felix Held Change-Id: I8061364879d772469882fc060f92676de6f600a9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62546 Tested-by: build bot (Jenkins) Reviewed-by: Raul Rangel --- src/soc/amd/cezanne/root_complex.c | 2 +- src/soc/amd/picasso/root_complex.c | 2 +- src/soc/amd/sabrina/root_complex.c | 2 +- src/soc/amd/stoneyridge/northbridge.c | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) (limited to 'src') diff --git a/src/soc/amd/cezanne/root_complex.c b/src/soc/amd/cezanne/root_complex.c index e29b4e03e4..dabfa789aa 100644 --- a/src/soc/amd/cezanne/root_complex.c +++ b/src/soc/amd/cezanne/root_complex.c @@ -168,7 +168,7 @@ static void read_resources(struct device *dev) } /* GNB IOAPIC resource */ - gnb_apic = new_resource(dev, GNB_IO_APIC_ADDR); + gnb_apic = new_resource(dev, idx++); gnb_apic->base = GNB_IO_APIC_ADDR; gnb_apic->size = 0x00001000; gnb_apic->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; diff --git a/src/soc/amd/picasso/root_complex.c b/src/soc/amd/picasso/root_complex.c index 076588e4f9..a3a3d4ba64 100644 --- a/src/soc/amd/picasso/root_complex.c +++ b/src/soc/amd/picasso/root_complex.c @@ -166,7 +166,7 @@ static void read_resources(struct device *dev) } /* GNB IOAPIC resource */ - gnb_apic = new_resource(dev, GNB_IO_APIC_ADDR); + gnb_apic = new_resource(dev, idx++); gnb_apic->base = GNB_IO_APIC_ADDR; gnb_apic->size = 0x00001000; gnb_apic->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; diff --git a/src/soc/amd/sabrina/root_complex.c b/src/soc/amd/sabrina/root_complex.c index fc49f4fb9b..2a3ed6f753 100644 --- a/src/soc/amd/sabrina/root_complex.c +++ b/src/soc/amd/sabrina/root_complex.c @@ -170,7 +170,7 @@ static void read_resources(struct device *dev) } /* GNB IOAPIC resource */ - gnb_apic = new_resource(dev, GNB_IO_APIC_ADDR); + gnb_apic = new_resource(dev, idx++); gnb_apic->base = GNB_IO_APIC_ADDR; gnb_apic->size = 0x00001000; gnb_apic->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c index 0a8064888f..0384e00b88 100644 --- a/src/soc/amd/stoneyridge/northbridge.c +++ b/src/soc/amd/stoneyridge/northbridge.c @@ -68,7 +68,7 @@ static void read_resources(struct device *dev) mmconf_resource(dev, idx++); /* NB IOAPIC2 resource */ - res = new_resource(dev, IO_APIC2_ADDR); /* IOAPIC2 */ + res = new_resource(dev, idx++); /* IOAPIC2 */ res->base = IO_APIC2_ADDR; res->size = 0x00001000; res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; -- cgit v1.2.3