From afc63844e2b889f746163914afe3733c8b4ae1b4 Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Wed, 5 Dec 2018 11:02:11 +0100 Subject: src/northbridge: Get rid of device_t MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Use of device_t is deprecated. Change-Id: I862bad4e889af3d25a771637a9ffc4f9d0b26d33 Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/c/30046 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki --- src/northbridge/amd/amdmct/mct_ddr3/s3utils.c | 35 ++++++++++++++++++++++++--- src/northbridge/via/vx900/pci_util.c | 29 ++++++++++++++++++---- 2 files changed, 55 insertions(+), 9 deletions(-) (limited to 'src') diff --git a/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c b/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c index eb39c811f9..c4db5c5f6b 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c @@ -67,7 +67,14 @@ ssize_t get_s3nv_file_offset(void) return s3nv_region.region.offset; } -static uint32_t read_config32_dct(device_t dev, uint8_t node, uint8_t dct, uint32_t reg) { +#ifdef __SIMPLE_DEVICE__ +static uint32_t read_config32_dct(pci_devfn_t dev, uint8_t node, uint8_t dct, + uint32_t reg) +#else +static uint32_t read_config32_dct(struct device *dev, uint8_t node, uint8_t dct, + uint32_t reg) +#endif +{ if (is_fam15h()) { uint32_t dword; #ifdef __PRE_RAM__ @@ -89,7 +96,14 @@ static uint32_t read_config32_dct(device_t dev, uint8_t node, uint8_t dct, uint3 return pci_read_config32(dev, reg); } -static void write_config32_dct(device_t dev, uint8_t node, uint8_t dct, uint32_t reg, uint32_t value) { +#ifdef __SIMPLE_DEVICE__ +static void write_config32_dct(pci_devfn_t dev, uint8_t node, uint8_t dct, + uint32_t reg, uint32_t value) +#else +static void write_config32_dct(struct device *dev, uint8_t node, uint8_t dct, + uint32_t reg, uint32_t value) +#endif +{ if (is_fam15h()) { uint32_t dword; #ifdef __PRE_RAM__ @@ -111,7 +125,13 @@ static void write_config32_dct(device_t dev, uint8_t node, uint8_t dct, uint32_t pci_write_config32(dev, reg, value); } -static uint32_t read_amd_dct_index_register(device_t dev, uint32_t index_ctl_reg, uint32_t index) +#ifdef __SIMPLE_DEVICE__ +static uint32_t read_amd_dct_index_register(pci_devfn_t dev, + uint32_t index_ctl_reg, uint32_t index) +#else +static uint32_t read_amd_dct_index_register(struct device *dev, + uint32_t index_ctl_reg, uint32_t index) +#endif { uint32_t dword; @@ -125,7 +145,14 @@ static uint32_t read_amd_dct_index_register(device_t dev, uint32_t index_ctl_reg return dword; } -static uint32_t read_amd_dct_index_register_dct(device_t dev, uint8_t node, uint8_t dct, uint32_t index_ctl_reg, uint32_t index) +#ifdef __SIMPLE_DEVICE__ +static uint32_t read_amd_dct_index_register_dct(pci_devfn_t dev, uint8_t node, + uint8_t dct, uint32_t index_ctl_reg, uint32_t index) +#else +static uint32_t read_amd_dct_index_register_dct(struct device *dev, + uint8_t node, uint8_t dct, uint32_t index_ctl_reg, + uint32_t index) +#endif { if (is_fam15h()) { uint32_t dword; diff --git a/src/northbridge/via/vx900/pci_util.c b/src/northbridge/via/vx900/pci_util.c index 1674e85cc2..08e2b54c37 100644 --- a/src/northbridge/via/vx900/pci_util.c +++ b/src/northbridge/via/vx900/pci_util.c @@ -16,7 +16,11 @@ #include "vx900.h" -void dump_pci_device(device_t dev) +#ifdef __SIMPLE_DEVICE__ +void dump_pci_device(pci_devfn_t dev) +#else +void dump_pci_device(struct device *dev) +#endif { int i; for (i = 0; i <= 0xff; i++) { @@ -35,8 +39,13 @@ void dump_pci_device(device_t dev) } } -void pci_mod_config8(device_t dev, unsigned int where, - uint8_t clr_mask, uint8_t set_mask) +#ifdef __SIMPLE_DEVICE__ +void pci_mod_config8(pci_devfn_t dev, unsigned int where, uint8_t clr_mask, + uint8_t set_mask) +#else +void pci_mod_config8(struct device *dev, unsigned int where, uint8_t clr_mask, + uint8_t set_mask) +#endif { uint8_t reg8 = pci_read_config8(dev, where); reg8 &= ~clr_mask; @@ -44,8 +53,13 @@ void pci_mod_config8(device_t dev, unsigned int where, pci_write_config8(dev, where, reg8); } -void pci_mod_config16(device_t dev, unsigned int where, +#ifdef __SIMPLE_DEVICE__ +void pci_mod_config16(pci_devfn_t dev, unsigned int where, uint16_t clr_mask, uint16_t set_mask) +#else +void pci_mod_config16(struct device *dev, unsigned int where, + uint16_t clr_mask, uint16_t set_mask) +#endif { uint16_t reg16 = pci_read_config16(dev, where); reg16 &= ~clr_mask; @@ -53,8 +67,13 @@ void pci_mod_config16(device_t dev, unsigned int where, pci_write_config16(dev, where, reg16); } -void pci_mod_config32(device_t dev, unsigned int where, +#ifdef __SIMPLE_DEVICE__ +void pci_mod_config32(pci_devfn_t dev, unsigned int where, + uint32_t clr_mask, uint32_t set_mask) +#else +void pci_mod_config32(struct device *dev, unsigned int where, uint32_t clr_mask, uint32_t set_mask) +#endif { uint32_t reg32 = pci_read_config32(dev, where); reg32 &= ~clr_mask; -- cgit v1.2.3