From aa7eb08dc869982b20fda48cabe8066ede0e92f0 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Tue, 15 Jun 2021 20:09:40 +0200 Subject: mb/google/zork: enable UART0 in devicetree This a mainly a preparation for adding the MMIO UART devices to the chipset devicetree. TEST=none Signed-off-by: Felix Held Change-Id: I533e4a909fdeb1614dbc5df015440b9df5d83233 Reviewed-on: https://review.coreboot.org/c/coreboot/+/55544 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons Reviewed-by: Raul Rangel --- src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb | 1 + src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb | 1 + 2 files changed, 2 insertions(+) (limited to 'src') diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb b/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb index aa70616a94..f17eca77ca 100644 --- a/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb +++ b/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb @@ -395,6 +395,7 @@ chip soc/amd/picasso end end + device mmio 0xfedc9000 on end # console on UART0 device mmio 0xfedca000 off end # UART1 device mmio 0xfedce000 off end # UART2 device mmio 0xfedcf000 off end # UART3 diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb b/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb index 3bf6fbc429..88fa360743 100644 --- a/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb +++ b/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb @@ -437,6 +437,7 @@ chip soc/amd/picasso end end + device mmio 0xfedc9000 on end # console on UART0 device mmio 0xfedca000 off end # UART1 device mmio 0xfedce000 off end # UART2 device mmio 0xfedcf000 off end # UART3 -- cgit v1.2.3