From a86e4ba8bdc7fd45ab76697d32d4e95cf3116700 Mon Sep 17 00:00:00 2001 From: David Hendricks Date: Tue, 12 Feb 2013 15:37:12 -0800 Subject: snow: Set up MMU after DRAM is working This was omitted earlier while we were debugging DRAM code (0a5bc7f). It was likely broken due to inconsistent units earlier on. Now that things are cleaned up and working, let's add it back in. Change-Id: I2f356355c98b2896e2371fa63b9c9f20ae76d634 Signed-off-by: David Hendricks Reviewed-on: http://review.coreboot.org/2379 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich --- src/mainboard/google/snow/romstage.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src') diff --git a/src/mainboard/google/snow/romstage.c b/src/mainboard/google/snow/romstage.c index 53072d1efb..9891011fe4 100644 --- a/src/mainboard/google/snow/romstage.c +++ b/src/mainboard/google/snow/romstage.c @@ -82,6 +82,8 @@ void main(void) while(1); } + mmu_setup(CONFIG_SYS_SDRAM_BASE, CONFIG_DRAM_SIZE_MB); + entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/coreboot_ram"); printk(BIOS_INFO, "entry is 0x%p, leaving romstage.\n", entry); -- cgit v1.2.3