From a6bff2d8ab4824a95221fda8a3b175c3f4337720 Mon Sep 17 00:00:00 2001 From: Srinidhi N Kaushik Date: Thu, 12 Mar 2020 01:15:43 -0700 Subject: soc/intel/tigerlake: Enable CNVi through dev_enabled Check for dev enabled status for CNVi and update the UPD accordingly. BUG=none BRANCH=none TEST=Build and boot tglrvp Signed-off-by: Srinidhi N Kaushik Change-Id: I15a03cc70f12e094badf942dd81f22bd09531051 Reviewed-on: https://review.coreboot.org/c/coreboot/+/39465 Tested-by: build bot (Jenkins) Reviewed-by: Wonkyu Kim Reviewed-by: Nick Vaccaro --- src/soc/intel/tigerlake/chip.h | 4 ---- src/soc/intel/tigerlake/fsp_params_tgl.c | 7 +++++-- 2 files changed, 5 insertions(+), 6 deletions(-) (limited to 'src') diff --git a/src/soc/intel/tigerlake/chip.h b/src/soc/intel/tigerlake/chip.h index 5e010bda59..87aa8943e4 100644 --- a/src/soc/intel/tigerlake/chip.h +++ b/src/soc/intel/tigerlake/chip.h @@ -222,10 +222,6 @@ struct soc_intel_tigerlake_config { /* Enable Pch iSCLK */ uint8_t pch_isclk; - /* CNVi */ - uint8_t CnviMode; - uint8_t CnviBtCore; - /* CNVi BT Audio Offload: Enable/Disable BT Audio Offload. */ enum { FORCE_DISABLE, diff --git a/src/soc/intel/tigerlake/fsp_params_tgl.c b/src/soc/intel/tigerlake/fsp_params_tgl.c index 7230a4c7e0..33abac4411 100644 --- a/src/soc/intel/tigerlake/fsp_params_tgl.c +++ b/src/soc/intel/tigerlake/fsp_params_tgl.c @@ -174,8 +174,11 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) params->PchLanEnable = dev->enabled; /* CNVi */ - params->CnviMode = config->CnviMode; - params->CnviBtCore = config->CnviBtCore; + dev = pcidev_path_on_root(PCH_DEVFN_CNVI_WIFI); + if (dev) + params->CnviMode = dev->enabled; + else + params->CnviMode = 0; /* Legacy 8254 timer support */ params->Enable8254ClockGating = !CONFIG_USE_LEGACY_8254_TIMER; -- cgit v1.2.3