From a271b1d13dbc360d8c856289b93d269a015c83a0 Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Sun, 16 Jul 2017 11:29:02 -0700 Subject: sb/amd/cs5536: Remove includes of C files The romstage for CS5536 platforms were including early_smbus.c and early_setup.c. Build these into romstage from the makefile, and remove the #includes. Add a Kconfig option for platforms that do not use the early smbus code. Change-Id: I2e6a9cd859292b4dd4720b547d1ff0bbb6c319cf Signed-off-by: Martin Roth Reviewed-on: https://review.coreboot.org/20607 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi Reviewed-by: Paul Menzel --- src/mainboard/aaeon/pfm-540i_revb/romstage.c | 2 -- src/mainboard/amd/db800/romstage.c | 2 -- src/mainboard/amd/f2950/romstage.c | 2 -- src/mainboard/amd/norwich/romstage.c | 2 -- src/mainboard/amd/rumba/romstage.c | 3 +-- src/mainboard/artecgroup/dbe61/romstage.c | 2 -- src/mainboard/bachmann/ot200/romstage.c | 2 -- src/mainboard/digitallogic/msm800sev/romstage.c | 2 -- src/mainboard/iei/pcisa-lx-800-r10/romstage.c | 2 -- src/mainboard/iei/pm-lx-800-r11/romstage.c | 2 -- src/mainboard/iei/pm-lx2-800-r10/romstage.c | 2 -- src/mainboard/lippert/hurricane-lx/romstage.c | 3 +-- src/mainboard/lippert/literunner-lx/romstage.c | 3 +-- src/mainboard/lippert/roadrunner-lx/romstage.c | 2 -- src/mainboard/lippert/spacerunner-lx/romstage.c | 3 +-- src/mainboard/pcengines/alix1c/Kconfig | 1 + src/mainboard/pcengines/alix1c/romstage.c | 4 ---- src/mainboard/pcengines/alix2d/Kconfig | 1 + src/mainboard/pcengines/alix2d/romstage.c | 5 ----- src/mainboard/traverse/geos/romstage.c | 2 -- src/mainboard/winent/pl6064/romstage.c | 2 -- src/mainboard/wyse/s50/romstage.c | 3 +-- src/southbridge/amd/cs5536/Kconfig | 9 +++++++++ src/southbridge/amd/cs5536/Makefile.inc | 3 +++ src/southbridge/amd/cs5536/cs5536.h | 4 ++++ src/southbridge/amd/cs5536/early_setup.c | 8 +++++++- src/southbridge/amd/cs5536/early_smbus.c | 8 ++++++-- 27 files changed, 36 insertions(+), 48 deletions(-) (limited to 'src') diff --git a/src/mainboard/aaeon/pfm-540i_revb/romstage.c b/src/mainboard/aaeon/pfm-540i_revb/romstage.c index c35a68d6fe..7efd9888da 100644 --- a/src/mainboard/aaeon/pfm-540i_revb/romstage.c +++ b/src/mainboard/aaeon/pfm-540i_revb/romstage.c @@ -28,8 +28,6 @@ #include #include #include -#include "southbridge/amd/cs5536/early_smbus.c" -#include "southbridge/amd/cs5536/early_setup.c" #include #include diff --git a/src/mainboard/amd/db800/romstage.c b/src/mainboard/amd/db800/romstage.c index f9b682ab71..5ebc76dc1e 100644 --- a/src/mainboard/amd/db800/romstage.c +++ b/src/mainboard/amd/db800/romstage.c @@ -25,8 +25,6 @@ #include #include #include -#include "southbridge/amd/cs5536/early_smbus.c" -#include "southbridge/amd/cs5536/early_setup.c" #include #include #include diff --git a/src/mainboard/amd/f2950/romstage.c b/src/mainboard/amd/f2950/romstage.c index 6d59995e94..341a8eab9f 100644 --- a/src/mainboard/amd/f2950/romstage.c +++ b/src/mainboard/amd/f2950/romstage.c @@ -25,8 +25,6 @@ #include #include #include -#include "southbridge/amd/cs5536/early_smbus.c" -#include "southbridge/amd/cs5536/early_setup.c" #include #include #include diff --git a/src/mainboard/amd/norwich/romstage.c b/src/mainboard/amd/norwich/romstage.c index 52df8561e5..288a647ff2 100644 --- a/src/mainboard/amd/norwich/romstage.c +++ b/src/mainboard/amd/norwich/romstage.c @@ -25,8 +25,6 @@ #include #include #include -#include "southbridge/amd/cs5536/early_smbus.c" -#include "southbridge/amd/cs5536/early_setup.c" #include int spd_read_byte(unsigned int device, unsigned int address) diff --git a/src/mainboard/amd/rumba/romstage.c b/src/mainboard/amd/rumba/romstage.c index 2568a92b72..4d9600a8d0 100644 --- a/src/mainboard/amd/rumba/romstage.c +++ b/src/mainboard/amd/rumba/romstage.c @@ -22,8 +22,7 @@ #include #include #include -#include "southbridge/amd/cs5536/early_smbus.c" -#include "southbridge/amd/cs5536/early_setup.c" +#include #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) diff --git a/src/mainboard/artecgroup/dbe61/romstage.c b/src/mainboard/artecgroup/dbe61/romstage.c index 1e7d680747..215d0d9d33 100644 --- a/src/mainboard/artecgroup/dbe61/romstage.c +++ b/src/mainboard/artecgroup/dbe61/romstage.c @@ -26,8 +26,6 @@ #include #include "spd_table.h" #include -#include "southbridge/amd/cs5536/early_smbus.c" -#include "southbridge/amd/cs5536/early_setup.c" #include int spd_read_byte(unsigned int device, unsigned int address) diff --git a/src/mainboard/bachmann/ot200/romstage.c b/src/mainboard/bachmann/ot200/romstage.c index f0e502d6fb..a40f75948b 100644 --- a/src/mainboard/bachmann/ot200/romstage.c +++ b/src/mainboard/bachmann/ot200/romstage.c @@ -27,8 +27,6 @@ #include #include #include -#include "southbridge/amd/cs5536/early_smbus.c" -#include "southbridge/amd/cs5536/early_setup.c" #include int spd_read_byte(unsigned int device, unsigned int address) diff --git a/src/mainboard/digitallogic/msm800sev/romstage.c b/src/mainboard/digitallogic/msm800sev/romstage.c index dee326d5cf..81975cf49d 100644 --- a/src/mainboard/digitallogic/msm800sev/romstage.c +++ b/src/mainboard/digitallogic/msm800sev/romstage.c @@ -23,8 +23,6 @@ #include #include #include -#include "southbridge/amd/cs5536/early_smbus.c" -#include "southbridge/amd/cs5536/early_setup.c" #include #include #include diff --git a/src/mainboard/iei/pcisa-lx-800-r10/romstage.c b/src/mainboard/iei/pcisa-lx-800-r10/romstage.c index 6b8c73c92d..f5d5de415a 100644 --- a/src/mainboard/iei/pcisa-lx-800-r10/romstage.c +++ b/src/mainboard/iei/pcisa-lx-800-r10/romstage.c @@ -26,8 +26,6 @@ #include #include #include -#include "southbridge/amd/cs5536/early_smbus.c" -#include "southbridge/amd/cs5536/early_setup.c" #include #include #include diff --git a/src/mainboard/iei/pm-lx-800-r11/romstage.c b/src/mainboard/iei/pm-lx-800-r11/romstage.c index e6cf98ae67..52936ad837 100644 --- a/src/mainboard/iei/pm-lx-800-r11/romstage.c +++ b/src/mainboard/iei/pm-lx-800-r11/romstage.c @@ -25,8 +25,6 @@ #include #include #include -#include -#include #include #include #include diff --git a/src/mainboard/iei/pm-lx2-800-r10/romstage.c b/src/mainboard/iei/pm-lx2-800-r10/romstage.c index b0f9d33625..3ea6013b55 100644 --- a/src/mainboard/iei/pm-lx2-800-r10/romstage.c +++ b/src/mainboard/iei/pm-lx2-800-r10/romstage.c @@ -27,8 +27,6 @@ #include #include #include -#include -#include #include #include diff --git a/src/mainboard/lippert/hurricane-lx/romstage.c b/src/mainboard/lippert/hurricane-lx/romstage.c index 9d7b565da1..2647ec8dd5 100644 --- a/src/mainboard/lippert/hurricane-lx/romstage.c +++ b/src/mainboard/lippert/hurricane-lx/romstage.c @@ -27,9 +27,8 @@ #include #include #include +#include #include -#include "southbridge/amd/cs5536/early_smbus.c" -#include "southbridge/amd/cs5536/early_setup.c" #include #include #include diff --git a/src/mainboard/lippert/literunner-lx/romstage.c b/src/mainboard/lippert/literunner-lx/romstage.c index 1474ecd7db..e36d4ca8de 100644 --- a/src/mainboard/lippert/literunner-lx/romstage.c +++ b/src/mainboard/lippert/literunner-lx/romstage.c @@ -28,8 +28,7 @@ #include #include #include -#include "southbridge/amd/cs5536/early_smbus.c" -#include "southbridge/amd/cs5536/early_setup.c" +#include #include #include #include diff --git a/src/mainboard/lippert/roadrunner-lx/romstage.c b/src/mainboard/lippert/roadrunner-lx/romstage.c index 8341178f82..65ddcb7100 100644 --- a/src/mainboard/lippert/roadrunner-lx/romstage.c +++ b/src/mainboard/lippert/roadrunner-lx/romstage.c @@ -28,8 +28,6 @@ #include #include #include -#include "southbridge/amd/cs5536/early_smbus.c" -#include "southbridge/amd/cs5536/early_setup.c" #include #include #include diff --git a/src/mainboard/lippert/spacerunner-lx/romstage.c b/src/mainboard/lippert/spacerunner-lx/romstage.c index a73276edb0..897de07a5a 100644 --- a/src/mainboard/lippert/spacerunner-lx/romstage.c +++ b/src/mainboard/lippert/spacerunner-lx/romstage.c @@ -28,8 +28,7 @@ #include #include #include -#include "southbridge/amd/cs5536/early_smbus.c" -#include "southbridge/amd/cs5536/early_setup.c" +#include #include #include #include diff --git a/src/mainboard/pcengines/alix1c/Kconfig b/src/mainboard/pcengines/alix1c/Kconfig index bbd78a3e1b..75b3d07b6d 100644 --- a/src/mainboard/pcengines/alix1c/Kconfig +++ b/src/mainboard/pcengines/alix1c/Kconfig @@ -13,6 +13,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select POWER_BUTTON_DEFAULT_DISABLE select HAVE_OPTION_TABLE select HAVE_CMOS_DEFAULT + select NO_EARLY_SMBUS config MAINBOARD_DIR string diff --git a/src/mainboard/pcengines/alix1c/romstage.c b/src/mainboard/pcengines/alix1c/romstage.c index 1d43069df4..962e15d0f0 100644 --- a/src/mainboard/pcengines/alix1c/romstage.c +++ b/src/mainboard/pcengines/alix1c/romstage.c @@ -30,10 +30,6 @@ #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) -/* The ALIX1.C has no SMBus; the setup is hard-wired. */ -static void cs5536_enable_smbus(void) { } - -#include "southbridge/amd/cs5536/early_setup.c" #include #include diff --git a/src/mainboard/pcengines/alix2d/Kconfig b/src/mainboard/pcengines/alix2d/Kconfig index a350e11fad..95a68aa1e7 100644 --- a/src/mainboard/pcengines/alix2d/Kconfig +++ b/src/mainboard/pcengines/alix2d/Kconfig @@ -10,6 +10,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select UDELAY_TSC select BOARD_ROMSIZE_KB_512 select POWER_BUTTON_FORCE_DISABLE + select NO_EARLY_SMBUS config MAINBOARD_DIR string diff --git a/src/mainboard/pcengines/alix2d/romstage.c b/src/mainboard/pcengines/alix2d/romstage.c index c7bf9efa4a..750f755859 100644 --- a/src/mainboard/pcengines/alix2d/romstage.c +++ b/src/mainboard/pcengines/alix2d/romstage.c @@ -30,11 +30,6 @@ #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) -/* The ALIX.2D has no SMBus; the setup is hard-wired. */ -static void cs5536_enable_smbus(void) { } - -#include "southbridge/amd/cs5536/early_setup.c" - /* The part is a Hynix hy5du121622ctp-d43. * * HY 5D U 12 16 2 2 C T P D43 diff --git a/src/mainboard/traverse/geos/romstage.c b/src/mainboard/traverse/geos/romstage.c index abf2ec94be..a0c1e17b1e 100644 --- a/src/mainboard/traverse/geos/romstage.c +++ b/src/mainboard/traverse/geos/romstage.c @@ -26,8 +26,6 @@ #include #include #include -#include "southbridge/amd/cs5536/early_smbus.c" -#include "southbridge/amd/cs5536/early_setup.c" #include int spd_read_byte(unsigned int device, unsigned int address) diff --git a/src/mainboard/winent/pl6064/romstage.c b/src/mainboard/winent/pl6064/romstage.c index 3399fc3833..624163b806 100644 --- a/src/mainboard/winent/pl6064/romstage.c +++ b/src/mainboard/winent/pl6064/romstage.c @@ -27,8 +27,6 @@ #include #include #include -#include "southbridge/amd/cs5536/early_smbus.c" -#include "southbridge/amd/cs5536/early_setup.c" #include #include #include diff --git a/src/mainboard/wyse/s50/romstage.c b/src/mainboard/wyse/s50/romstage.c index 3ebd40628b..8fc797c50c 100644 --- a/src/mainboard/wyse/s50/romstage.c +++ b/src/mainboard/wyse/s50/romstage.c @@ -24,8 +24,7 @@ #include #include #include -#include "southbridge/amd/cs5536/early_smbus.c" -#include "southbridge/amd/cs5536/early_setup.c" +#include static inline int spd_read_byte(unsigned int device, unsigned int address) { diff --git a/src/southbridge/amd/cs5536/Kconfig b/src/southbridge/amd/cs5536/Kconfig index 93e978788b..6b06c33642 100644 --- a/src/southbridge/amd/cs5536/Kconfig +++ b/src/southbridge/amd/cs5536/Kconfig @@ -16,3 +16,12 @@ config SOUTHBRIDGE_AMD_CS5536 bool select UDELAY_TSC + +if SOUTHBRIDGE_AMD_CS5536 + +config NO_EARLY_SMBUS + def_bool n + help + Skip the CS5536 early SMBUS initialization. + +endif diff --git a/src/southbridge/amd/cs5536/Makefile.inc b/src/southbridge/amd/cs5536/Makefile.inc index a274fe5987..4bd88ac587 100644 --- a/src/southbridge/amd/cs5536/Makefile.inc +++ b/src/southbridge/amd/cs5536/Makefile.inc @@ -15,6 +15,9 @@ ifeq ($(CONFIG_SOUTHBRIDGE_AMD_CS5536),y) +romstage-y += early_smbus.c +romstage-y += early_setup.c + ramstage-y += cs5536.c ramstage-y += ide.c ramstage-y += pirq.c diff --git a/src/southbridge/amd/cs5536/cs5536.h b/src/southbridge/amd/cs5536/cs5536.h index 7de9147e09..72dbd5c216 100644 --- a/src/southbridge/amd/cs5536/cs5536.h +++ b/src/southbridge/amd/cs5536/cs5536.h @@ -442,6 +442,10 @@ #if defined(__PRE_RAM__) void cs5536_setup_onchipuart(int uart); void cs5536_disable_internal_uart(void); +void cs5536_early_setup(void); + +void cs5536_enable_smbus(void); +int smbus_read_byte(unsigned device, unsigned address); #else void chipsetinit(void); #endif diff --git a/src/southbridge/amd/cs5536/early_setup.c b/src/southbridge/amd/cs5536/early_setup.c index 6c692225e4..0ccca36083 100644 --- a/src/southbridge/amd/cs5536/early_setup.c +++ b/src/southbridge/amd/cs5536/early_setup.c @@ -19,6 +19,12 @@ * AMD Geode GX Processor CS5536 Companion Device GeodeROM Porting Guide. */ +#include +#include +#include +#include +#include "cs5536.h" + /** * @brief Setup PCI IDSEL for CS5536 */ @@ -244,7 +250,7 @@ void cs5536_setup_onchipuart(int uart) * and we don't want to hang on serial, so they are * commented out */ -static void cs5536_early_setup(void) +void cs5536_early_setup(void) { msr_t msr; diff --git a/src/southbridge/amd/cs5536/early_smbus.c b/src/southbridge/amd/cs5536/early_smbus.c index e11b91f236..ed2b9429b4 100644 --- a/src/southbridge/amd/cs5536/early_smbus.c +++ b/src/southbridge/amd/cs5536/early_smbus.c @@ -13,13 +13,17 @@ * GNU General Public License for more details. */ +#include #include "cs5536.h" #include "smbus.h" /* initialization for SMBus Controller */ -static void cs5536_enable_smbus(void) +void cs5536_enable_smbus(void) { + if (IS_ENABLED(CONFIG_NO_EARLY_SMBUS)) + return; + /* Set SCL freq and enable SMB controller */ /*outb((0x20 << 1) | SMB_CTRL2_ENABLE, smbus_io_base + SMB_CTRL2); */ outb((0x7F << 1) | SMB_CTRL2_ENABLE, SMBUS_IO_BASE + SMB_CTRL2); @@ -29,7 +33,7 @@ static void cs5536_enable_smbus(void) } -static inline int smbus_read_byte(unsigned device, unsigned address) +int smbus_read_byte(unsigned device, unsigned address) { return do_smbus_read_byte(SMBUS_IO_BASE, device, address); } -- cgit v1.2.3