From a1e39248692e659d0cdf397251a8c138d290d334 Mon Sep 17 00:00:00 2001 From: Jonathan Neuschäfer Date: Sat, 27 Aug 2016 00:07:58 +0200 Subject: arch/riscv: Add missing "break;" MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: Iea3f12a5a7eb37586f5424db2d7a84c4319492f8 Reported-by: Coverity (1361947) Signed-off-by: Jonathan Neuschäfer Reviewed-on: https://review.coreboot.org/16335 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Martin Roth --- src/arch/riscv/trap_handler.c | 1 + 1 file changed, 1 insertion(+) (limited to 'src') diff --git a/src/arch/riscv/trap_handler.c b/src/arch/riscv/trap_handler.c index 29d5a0b28c..8120b66c06 100644 --- a/src/arch/riscv/trap_handler.c +++ b/src/arch/riscv/trap_handler.c @@ -35,6 +35,7 @@ void handle_supervisor_call(trapframe *tf) { /* TODO: parse the hardware-supplied config string and return the correct value */ returnValue = 1; + break; case SBI_ECALL_CONSOLE_PUT: returnValue = mcall_console_putchar(arg0); break; -- cgit v1.2.3