From a0be874637f509efe0e4f960ff8316096788a39c Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Wed, 10 Aug 2022 23:04:48 +0200 Subject: {sb,soc}/intel: Do not require hda_verb.c MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Just use the conditional inclusion through `device/Makefile.inc`. Change-Id: Id363a97460ae2cfe4b10d491d4ef06394eb530c2 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/66609 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber Reviewed-by: Michael Niewöhner --- src/soc/intel/broadwell/pch/Makefile.inc | 2 -- src/southbridge/intel/bd82x6x/Makefile.inc | 2 -- src/southbridge/intel/i82801gx/Makefile.inc | 2 -- src/southbridge/intel/i82801ix/Makefile.inc | 2 -- src/southbridge/intel/i82801jx/Makefile.inc | 2 -- src/southbridge/intel/ibexpeak/Makefile.inc | 2 -- src/southbridge/intel/lynxpoint/Makefile.inc | 2 -- 7 files changed, 14 deletions(-) (limited to 'src') diff --git a/src/soc/intel/broadwell/pch/Makefile.inc b/src/soc/intel/broadwell/pch/Makefile.inc index 5bd09ea6f7..c83c94773f 100644 --- a/src/soc/intel/broadwell/pch/Makefile.inc +++ b/src/soc/intel/broadwell/pch/Makefile.inc @@ -42,5 +42,3 @@ bootblock-$(CONFIG_SERIALIO_UART_CONSOLE) += ../../../../southbridge/intel/lynxp bootblock-$(CONFIG_SERIALIO_UART_CONSOLE) += ../../../../southbridge/intel/lynxpoint/uart_init.c all-$(CONFIG_SERIALIO_UART_CONSOLE) += ../../../../southbridge/intel/lynxpoint/uart.c smm-$(CONFIG_SERIALIO_UART_CONSOLE) += ../../../../southbridge/intel/lynxpoint/uart.c - -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/hda_verb.c diff --git a/src/southbridge/intel/bd82x6x/Makefile.inc b/src/southbridge/intel/bd82x6x/Makefile.inc index 58d721c178..0a4cc8333b 100644 --- a/src/southbridge/intel/bd82x6x/Makefile.inc +++ b/src/southbridge/intel/bd82x6x/Makefile.inc @@ -20,8 +20,6 @@ ramstage-y += me_common.c ramstage-y += smbus.c ramstage-y += ../common/pciehp.c -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/hda_verb.c - ramstage-y += me_status.c ramstage-$(CONFIG_ELOG) += elog.c diff --git a/src/southbridge/intel/i82801gx/Makefile.inc b/src/southbridge/intel/i82801gx/Makefile.inc index 95402a1dfc..b6fd0c324a 100644 --- a/src/southbridge/intel/i82801gx/Makefile.inc +++ b/src/southbridge/intel/i82801gx/Makefile.inc @@ -18,8 +18,6 @@ ramstage-y += smbus.c ramstage-y += usb.c ramstage-y += usb_ehci.c -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/hda_verb.c - smm-y += smihandler.c romstage-y += early_init.c diff --git a/src/southbridge/intel/i82801ix/Makefile.inc b/src/southbridge/intel/i82801ix/Makefile.inc index d376622850..54e8c1c02b 100644 --- a/src/southbridge/intel/i82801ix/Makefile.inc +++ b/src/southbridge/intel/i82801ix/Makefile.inc @@ -20,8 +20,6 @@ ramstage-y += thermal.c ramstage-y += usb_ehci.c ramstage-y += ../common/pciehp.c -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/hda_verb.c - smm-y += smihandler.c ifneq ($(CONFIG_BOARD_EMULATION_QEMU_X86_Q35),y) diff --git a/src/southbridge/intel/i82801jx/Makefile.inc b/src/southbridge/intel/i82801jx/Makefile.inc index f4893c2ea4..b5fbb77398 100644 --- a/src/southbridge/intel/i82801jx/Makefile.inc +++ b/src/southbridge/intel/i82801jx/Makefile.inc @@ -19,8 +19,6 @@ ramstage-y += thermal.c ramstage-y += usb_ehci.c ramstage-y += ../common/pciehp.c -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/hda_verb.c - smm-y += smihandler.c CPPFLAGS_common += -I$(src)/southbridge/intel/i82801jx/include diff --git a/src/southbridge/intel/ibexpeak/Makefile.inc b/src/southbridge/intel/ibexpeak/Makefile.inc index b33252fea4..1cf3d1c6dd 100644 --- a/src/southbridge/intel/ibexpeak/Makefile.inc +++ b/src/southbridge/intel/ibexpeak/Makefile.inc @@ -17,8 +17,6 @@ ramstage-y += smbus.c ramstage-y += thermal.c ramstage-y += ../common/pciehp.c -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/hda_verb.c - ramstage-y += ../bd82x6x/me_status.c ramstage-$(CONFIG_ELOG) += ../bd82x6x/elog.c diff --git a/src/southbridge/intel/lynxpoint/Makefile.inc b/src/southbridge/intel/lynxpoint/Makefile.inc index 02022d348d..08dd6dd299 100644 --- a/src/southbridge/intel/lynxpoint/Makefile.inc +++ b/src/southbridge/intel/lynxpoint/Makefile.inc @@ -20,8 +20,6 @@ ramstage-$(CONFIG_INTEL_LYNXPOINT_LP) += serialio.c ifneq ($(CONFIG_VARIANT_DIR),) ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/hda_verb.c -else -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/hda_verb.c endif ramstage-y += me_status.c -- cgit v1.2.3