From 9f244a5494192707bfbb72e60f17411e9a35434a Mon Sep 17 00:00:00 2001 From: Andrey Petrov Date: Mon, 5 Jun 2017 18:24:50 -0700 Subject: soc/intel/cannonlake: Add Makefile This enables building working bootblock and non-functional romstage and ramstage. Change-Id: I580cd2c3279d742f202b2adfbe55c814cfb48f99 Signed-off-by: Andrey Petrov Reviewed-on: https://review.coreboot.org/20073 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/soc/intel/cannonlake/Makefile.inc | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) (limited to 'src') diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc index 4651a23862..8afd7ce306 100644 --- a/src/soc/intel/cannonlake/Makefile.inc +++ b/src/soc/intel/cannonlake/Makefile.inc @@ -1,7 +1,27 @@ ifeq ($(CONFIG_SOC_INTEL_CANNONLAKE),y) +subdirs-y += ../../../cpu/x86/mtrr +subdirs-y += ../../../cpu/x86/tsc + +bootblock-$(CONFIG_DRIVERS_UART_8250MEM) += uart.c +bootblock-y += bootblock/bootblock.c +bootblock-y += bootblock/cpu.c +bootblock-y += bootblock/pch.c +bootblock-y += bootblock/report_platform.c +bootblock-y += gpio.c + romstage-y += cbmem.c +romstage-y += reset.c +romstage-$(CONFIG_DRIVERS_UART_8250MEM) += uart.c ramstage-y += cbmem.c +ramstage-$(CONFIG_PLATFORM_USES_FSP2_0) += reset.c +ramstage-$(CONFIG_DRIVERS_UART_8250MEM) += uart.c + +CPPFLAGS_common += -I$(src)/soc/intel/cannonlake/include/fsp20 +CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp2_0/cannonlake + +CPPFLAGS_common += -I$(src)/soc/intel/cannonlake +CPPFLAGS_common += -I$(src)/soc/intel/cannonlake/include endif -- cgit v1.2.3