From 9ebfb8d4130c8b61015b6bcdf477216bab7e3086 Mon Sep 17 00:00:00 2001 From: Vidya Gopalakrishnan Date: Wed, 17 Aug 2022 18:36:41 +0530 Subject: mb/google/brya/variants/nivviks: Define DPTF policies for Nirwen Added DPTF passive, critical, active policies for Nirwen. Added additional TSR for Nivviks and updated the PL2 time window Ref: EDS doc#645550 BUG=b:238713292 TEST= Boot to OS and verify dptf policies are set based on fw_config. Signed-off-by: Vidya Gopalakrishnan Change-Id: Iae46736d8d7723a20983dcaad42a7007d76cfad8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/66833 Tested-by: build bot (Jenkins) Reviewed-by: Reka Norman Reviewed-by: V Sowmya Reviewed-by: Sumeet R Pawnikar --- .../google/brya/variants/nivviks/overridetree.cb | 102 ++++++++++++++++++++- 1 file changed, 100 insertions(+), 2 deletions(-) (limited to 'src') diff --git a/src/mainboard/google/brya/variants/nivviks/overridetree.cb b/src/mainboard/google/brya/variants/nivviks/overridetree.cb index df5935d4c0..8e2724d951 100644 --- a/src/mainboard/google/brya/variants/nivviks/overridetree.cb +++ b/src/mainboard/google/brya/variants/nivviks/overridetree.cb @@ -124,6 +124,7 @@ chip soc/intel/alderlake ## sensor information register "options.tsr[0].desc" = ""Memory"" register "options.tsr[1].desc" = ""Charger"" + register "options.tsr[2].desc" = ""Ambient"" # TODO: below values are initial reference values only ## Passive Policy @@ -131,6 +132,7 @@ chip soc/intel/alderlake [0] = DPTF_PASSIVE(CPU, CPU, 95, 5000), [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 75, 5000), [2] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_1, 75, 5000), + [3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 75, 5000), }" ## Critical Policy @@ -138,6 +140,7 @@ chip soc/intel/alderlake [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN), [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 85, SHUTDOWN), [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 85, SHUTDOWN), + [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 85, SHUTDOWN), }" register "controls.power_limits" = "{ @@ -151,8 +154,8 @@ chip soc/intel/alderlake .pl2 = { .min_power = 25000, .max_power = 25000, - .time_window_min = 28 * MSECS_PER_SEC, - .time_window_max = 32 * MSECS_PER_SEC, + .time_window_min = 1, + .time_window_max = 1, .granularity = 1000 } }" @@ -169,6 +172,101 @@ chip soc/intel/alderlake probe THERMAL_SOLUTION THERMAL_SOLUTION_PASSIVE end end + chip drivers/intel/dptf + ## sensor information + register "options.tsr[0].desc" = ""Memory"" + register "options.tsr[1].desc" = ""Charger"" + register "options.tsr[2].desc" = ""Ambient"" + + # TODO: below values are initial reference values only + ## Active Policy + register "policies.active" = "{ + [0] = { + .target = DPTF_CPU, + .thresholds = { + TEMP_PCT(85, 90), + TEMP_PCT(80, 80), + TEMP_PCT(75, 70), + TEMP_PCT(70, 50), + TEMP_PCT(65, 30), + } + }, + [1] = { + .target = DPTF_TEMP_SENSOR_2, + .thresholds = { + TEMP_PCT(50, 90), + TEMP_PCT(48, 70), + TEMP_PCT(46, 60), + TEMP_PCT(43, 40), + TEMP_PCT(40, 30), + } + } + }" + + # TODO: below values are initial reference values only + ## Passive Policy + register "policies.passive" = "{ + [0] = DPTF_PASSIVE(CPU, CPU, 95, 5000), + [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 75, 5000), + [2] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_1, 75, 5000), + [3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 75, 5000), + }" + + ## Critical Policy + register "policies.critical" = "{ + [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN), + [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 85, SHUTDOWN), + [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 85, SHUTDOWN), + [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 85, SHUTDOWN), + }" + + register "controls.power_limits" = "{ + .pl1 = { + .min_power = 12000, + .max_power = 15000, + .time_window_min = 28 * MSECS_PER_SEC, + .time_window_max = 32 * MSECS_PER_SEC, + .granularity = 200 + }, + .pl2 = { + .min_power = 35000, + .max_power = 35000, + .time_window_min = 1, + .time_window_max = 1, + .granularity = 1000 + } + }" + + ## Charger Performance Control (Control, mA) + register "controls.charger_perf" = "{ + [0] = { 255, 1700 }, + [1] = { 24, 1500 }, + [2] = { 16, 1000 }, + [3] = { 8, 500 } + }" + + ## Fan Performance Control (Percent, Speed, Noise, Power) + register "controls.fan_perf" = "{ + [0] = { 100, 6000, 220, 2200, }, + [1] = { 92, 5500, 180, 1800, }, + [2] = { 85, 5000, 145, 1450, }, + [3] = { 70, 4400, 115, 1150, }, + [4] = { 56, 3900, 90, 900, }, + [5] = { 45, 3300, 55, 550, }, + [6] = { 38, 3000, 30, 300, }, + [7] = { 33, 2900, 15, 150, }, + [8] = { 10, 800, 10, 100, }, + [9] = { 0, 0, 0, 50, } + }" + + ## Fan options + register "options.fan.fine_grained_control" = "1" + register "options.fan.step_size" = "2" + + device generic 1 on + probe THERMAL_SOLUTION THERMAL_SOLUTION_ACTIVE + end + end end device ref ipu on chip drivers/intel/mipi_camera -- cgit v1.2.3