From 9a41333c6bb68a1ebb5cf9d2a0d21257124a735e Mon Sep 17 00:00:00 2001 From: EricKY Cheng Date: Sat, 19 Nov 2022 01:50:57 +0800 Subject: mb/google/skyrim/var/winterhold: Add Vrm setting for SMT All parameters of DPTC_INPUT() need to be configured on devicetree when SOC_AMD_COMMON_BLOCK_ACPI_DPTC is enabled. The parameters without configurations on devicetree would be 0 when SOC_AMD_COMMON_BLOCK_ACPI_DPTC is enable. Follow AMD DevHub document #57316. Configure vrm_current_limit_mA, vrm_maximum_current_limit_mA and vrm_soc_current_limit_mA on devicetree with thermal table config E as default table for SMT. Since the dynamic thermal table switching mechanism is still under cooking, after discussing with thermal team, suggest adopting config E(limit Soc not reach to max power) as default thermal config to avoidany thermal-related issue during phase build. Once the dynamic thermal table switching mechanism is finished, will change the default value to config A. BUG=b:258572474, b:248976976, b:259167917, b:257394883 TEST=emerge-skyrim coreboot Signed-off-by: EricKY Cheng Change-Id: Ic1e7a46cac4119c7237d96a7bd0d23c8db028680 Reviewed-on: https://review.coreboot.org/c/coreboot/+/69830 Tested-by: build bot (Jenkins) Reviewed-by: Tim Van Patten Reviewed-by: Dtrain Hsu --- src/mainboard/google/skyrim/variants/winterhold/overridetree.cb | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'src') diff --git a/src/mainboard/google/skyrim/variants/winterhold/overridetree.cb b/src/mainboard/google/skyrim/variants/winterhold/overridetree.cb index 2078df8bec..f0c04ab9bb 100644 --- a/src/mainboard/google/skyrim/variants/winterhold/overridetree.cb +++ b/src/mainboard/google/skyrim/variants/winterhold/overridetree.cb @@ -26,6 +26,14 @@ chip soc/amd/mendocino register "stt_error_coeff" = "0x21" register "stt_error_rate_coefficient" = "0xCCD" + register "vrm_current_limit_mA" = "28000" + register "vrm_maximum_current_limit_mA" = "50000" + register "vrm_soc_current_limit_mA" = "10000" + # Throttle (e.g., Low/No Battery) + register "vrm_current_limit_throttle_mA" = "20000" + register "vrm_maximum_current_limit_throttle_mA" = "20000" + register "vrm_soc_current_limit_throttle_mA" = "10000" + device domain 0 on device ref gpp_bridge_a on # Internal GPP Bridge 0 to Bus A device ref xhci_1 on # XHCI1 controller -- cgit v1.2.3