From 964a70e998fd4b29d7df48d12a5dd51610043a3e Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Mon, 20 Jun 2022 23:03:16 +0530 Subject: soc/intel/alderlake: Fix PRMRR resource range calculation issue MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This patch fixes an issue introduced with commit ca741055e (soc/intel/adl: Add missing claimed memory regions) where PRMRR base should be read using MSR 0x2a0 and mask from MSR 0x1f5 instead System Agent PCI configuration space. With this change, coreboot is able to read PRMRR base when the PRMRR size > 0. TEST=Able to read PRMRR base MSR 0x2a0 in proper with this CL. Signed-off-by: Subrata Banik Change-Id: I3770b1a92dbd2552cf1b9764522c9cac9f29c13c Reviewed-on: https://review.coreboot.org/c/coreboot/+/65263 Tested-by: build bot (Jenkins) Reviewed-by: Werner Zeh Reviewed-by: Eran Mitrani --- src/soc/intel/alderlake/systemagent.c | 22 +++++++++++++++++++--- 1 file changed, 19 insertions(+), 3 deletions(-) (limited to 'src') diff --git a/src/soc/intel/alderlake/systemagent.c b/src/soc/intel/alderlake/systemagent.c index 170c56b71c..05de0ccfbe 100644 --- a/src/soc/intel/alderlake/systemagent.c +++ b/src/soc/intel/alderlake/systemagent.c @@ -8,6 +8,7 @@ #include #include +#include #include #include #include @@ -78,6 +79,17 @@ static void set_mmio_resource( resource->description = description; } +int soc_get_uncore_prmmr_base_and_mask(uint64_t *prmrr_base, + uint64_t *prmrr_mask) +{ + msr_t msr; + msr = rdmsr(MSR_PRMRR_BASE_0); + *prmrr_base = (uint64_t) msr.hi << 32 | msr.lo; + msr = rdmsr(MSR_PRMRR_PHYS_MASK); + *prmrr_mask = (uint64_t) msr.hi << 32 | msr.lo; + return 0; +} + /* * SoC implementation * @@ -112,9 +124,13 @@ void soc_add_configurable_mmio_resources(struct device *dev, int *resource_cnt) /* PMRR */ size = get_valid_prmrr_size(); if (size > 0) { - uint64_t mask = pci_read_config32(dev, MSR_PRMRR_PHYS_MASK); - base = pci_read_config32(dev, MSR_PRMRR_PHYS_BASE) & mask; - set_mmio_resource(&(cfg_rsrc[count++]), base, size, "PMRR"); + uint64_t mask; + if (soc_get_uncore_prmmr_base_and_mask(&base, &mask) == 0) { + base &= mask; + set_mmio_resource(&(cfg_rsrc[count++]), base, size, "PMRR"); + } else { + printk(BIOS_ERR, "SA: Failed to get PRMRR base and mask\n"); + } } /* GSM */ -- cgit v1.2.3