From 95c021b63a028e94a2f171b7e11774e2910898f9 Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Tue, 8 Jan 2019 11:09:37 +0100 Subject: intel/fsp1_0: Add option to select FSP debug level Useful for debugging FSP. Change-Id: I06e837cf1b051c55a531c3361e94fa1449bc8526 Signed-off-by: Patrick Rudolph Reviewed-on: https://review.coreboot.org/c/30741 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber Reviewed-by: Jay Talbott --- src/drivers/intel/fsp1_0/Kconfig | 11 +++++++++++ src/soc/intel/fsp_broadwell_de/fsp/chipset_fsp_util.c | 2 ++ 2 files changed, 13 insertions(+) (limited to 'src') diff --git a/src/drivers/intel/fsp1_0/Kconfig b/src/drivers/intel/fsp1_0/Kconfig index c7f6c18f86..b26976aee7 100644 --- a/src/drivers/intel/fsp1_0/Kconfig +++ b/src/drivers/intel/fsp1_0/Kconfig @@ -34,6 +34,17 @@ config DCACHE_RAM_SIZE hex default 0x4000 +config FSP_1_0_DEBUG_LEVEL + int "FSP debug level (0-3)" + default 0 + range 0 3 + help + Select the debug level, where: + 0: DISABLED + 1: MINIMUM + 2: NORMAL + 3: MAXIMUM + if HAVE_FSP_BIN config FSP_FILE diff --git a/src/soc/intel/fsp_broadwell_de/fsp/chipset_fsp_util.c b/src/soc/intel/fsp_broadwell_de/fsp/chipset_fsp_util.c index b64efce4ae..ef6212eb4b 100644 --- a/src/soc/intel/fsp_broadwell_de/fsp/chipset_fsp_util.c +++ b/src/soc/intel/fsp_broadwell_de/fsp/chipset_fsp_util.c @@ -69,6 +69,8 @@ static void ConfigureDefaultUpdData(UPD_DATA_REGION *UpdData) if (!IS_ENABLED(CONFIG_CONSOLE_SERIAL)) UpdData->SerialPortType = 0; + UpdData->DebugOutputLevel = CONFIG_FSP_1_0_DEBUG_LEVEL; + /* * Memory Down */ -- cgit v1.2.3