From 9450a40ffd167c3eef2d6a08d86c463df1ab7313 Mon Sep 17 00:00:00 2001 From: Karthikeyan Ramasubramanian Date: Wed, 1 Dec 2021 12:43:58 -0700 Subject: mb/google/guybrush: Configure EN_SPKR GPIO in PSP verstage EN_SPKR GPIO is used as a multiplexer select signal between RAM_ID straps and Developer Mode Beep signals. During boot up it is LOW and selects RAM_ID straps. When the system enters OS, it is driven HIGH and selects DEV BEEP signals. Since in some boards, the GPIO chosen is in S5 domain it does not reset until the system enters mechanical off (G3) state. On scenarios where the power button is pressed when the system is in S5, incorrect RAM_ID strap is being read because the EN_SPKR is still selecting DEV BEEP signal. This causes boot up failures. Fix this by configuring the EN_SPKR GPIO (in S5 domain) explicitly in PSP verstage. BUG=b:204450368 TEST=Build and boot to OS in Guybrush. Perform suspend-resume cycle followed by a S5 -> S0 boot cycle for 2 iterations successfully. Signed-off-by: Karthikeyan Ramasubramanian Change-Id: I9a52a167da9c7040731da5d355ec345fd9b13762 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59813 Reviewed-by: Rob Barnes Reviewed-by: Raul Rangel Reviewed-by: Paul Menzel Tested-by: build bot (Jenkins) --- src/mainboard/google/guybrush/variants/guybrush/gpio.c | 2 ++ src/mainboard/google/guybrush/variants/nipperkin/gpio.c | 2 ++ 2 files changed, 4 insertions(+) (limited to 'src') diff --git a/src/mainboard/google/guybrush/variants/guybrush/gpio.c b/src/mainboard/google/guybrush/variants/guybrush/gpio.c index fe2dcd117e..0ebee22555 100644 --- a/src/mainboard/google/guybrush/variants/guybrush/gpio.c +++ b/src/mainboard/google/guybrush/variants/guybrush/gpio.c @@ -42,6 +42,8 @@ static const struct soc_amd_gpio bid2_ramstage_gpio_table[] = { }; static const struct soc_amd_gpio override_early_gpio_table[] = { + /* BID>=2: EN_SPKR to select RAM_ID input, BID < 2: Unused in later stages */ + PAD_GPO(GPIO_31, LOW), /* BID == 1: SD_AUX_RESET_L */ PAD_GPO(GPIO_70, LOW), }; diff --git a/src/mainboard/google/guybrush/variants/nipperkin/gpio.c b/src/mainboard/google/guybrush/variants/nipperkin/gpio.c index 00fd9642fd..887be835dc 100644 --- a/src/mainboard/google/guybrush/variants/nipperkin/gpio.c +++ b/src/mainboard/google/guybrush/variants/nipperkin/gpio.c @@ -40,6 +40,8 @@ static const struct soc_amd_gpio bid2_override_gpio_table[] = { static const struct soc_amd_gpio override_early_gpio_table[] = { PAD_NC(GPIO_18), + /* BID==1: EN_SPKR to select RAM_ID input, BID >= 1: Unused in later stages */ + PAD_GPO(GPIO_31, LOW), }; static const struct soc_amd_gpio override_pcie_gpio_table[] = { -- cgit v1.2.3